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AgeCommit message (Expand)Author
2011-05-151) Initialize BSP fixed MTRRs to match AP fixed MTRR initialization.Scott Duplichan
2011-05-10Change read_option() to a macro that wraps some API uglynessPatrick Georgi
2011-05-10This replaces the fixed shift values in the apic timer init with macros.Vikram Narayanan
2011-05-03Enable caching for ROM area in model_6ex/cache_as_ram.incSven Schnelle
2011-04-26Add support for memory mapped UARTs to coreboot and add the OXPCIe952 as anStefan Reinauer
2011-04-21more ifdef -> if fixes.Stefan Reinauer
2011-04-21more ifdef -> if fixesStefan Reinauer
2011-04-19Fix some more misuses of ifdef/if definedStefan Reinauer
2011-04-14drop half an uart8250 implementation from smiutil and use the common code Stefan Reinauer
2011-04-14earlymtrr.c: wipe some dead code, use names instead of numbers and someStefan Reinauer
2011-04-14drop incorrectly used CONFIG_ROM_IMAGE_SIZE and unused CONFIG_ARCHStefan Reinauer
2011-04-14Use symbolic names for some MTRR bits instead of numbers in CAR codeStefan Reinauer
2011-04-11Unify use of post_codeAlexandru Gagniuc
2011-03-28Add AMD C32 support.Zheng Bao
2011-03-17Fix breaking the build after removing files in tthe previous checkin. Marc Jones
2011-03-04Add P-states for select Socket 754 processors.Jonathan Kollasch
2011-03-03Correct off-by-one problem in AMD pre-rev-F model-F PowerNow code.Jonathan Kollasch
2011-02-28Improving BKDG implementation of P-states,Xavi Drudis Ferran
2011-02-28Improving BKDG implementation of P-states,Xavi Drudis Ferran
2011-02-28Improving BKDG implementation of P-states,Xavi Drudis Ferran
2011-02-28Improving BKDG implementation of P-states,Xavi Drudis Ferran
2011-02-28Improving BKDG implementation of P-states,Xavi Drudis Ferran
2011-02-28Improving BKDG implementation of P-states,Xavi Drudis Ferran
2011-02-28Improving BKDG implementation of P-states,Xavi Drudis Ferran
2011-02-28Improving BKDG implementation of P-states,Xavi Drudis Ferran
2011-02-28Improving BKDG implementation of P-states,Xavi Drudis Ferran
2011-02-28Improving BKDG implementation of P-states,Xavi Drudis Ferran
2011-02-28Improving BKDG implementation of P-states,Xavi Drudis Ferran
2011-02-28Improving BKDG implementation of P-states,Xavi Drudis Ferran
2011-02-28Improving BKDG implementation of P-states,Xavi Drudis Ferran
2011-02-28Improving BKDG implementation of P-states,Xavi Drudis Ferran
2011-02-28Improving BKDG implementation of P-states,Xavi Drudis Ferran
2011-02-28Prepare for next patches (Improving BKDG implementation of P-states,Xavi Drudis Ferran
2011-02-27Prepare for next patches (Improving BKDG implementation of P-states,Xavi Drudis Ferran
2011-02-27Prepare for next patches (Improving BKDG implementation of P-states,Xavi Drudis Ferran
2011-02-27Prepare for next patches (Improving BKDG implementation of P-states,Xavi Drudis Ferran
2011-02-27Prepare for next patches (Improving BKDG implementation of P-states,Xavi Drudis Ferran
2011-02-27Prepare for next patches (Improving BKDG implementation of P-states,Xavi Drudis Ferran
2011-02-27Prepare for next patches (Improving BKDG implementation of P-states,Xavi Drudis Ferran
2011-02-27Prepare for next patches (Improving BKDG implementation of P-states,Xavi Drudis Ferran
2011-02-26Make AMD Fam10h CPU microcode updates optional in Expert modeXavi Drudis Ferran
2011-02-26It adds support for automatic PSS object generation for AMD pre fam Fh CPU. T...Rudolf Marek
2011-02-24Add compile-time defaults to some K8 CMOS options in case they're absent in CMOSJosef Kellermann
2011-02-14Add AMD cpu wrapper code. Patch 4 of 8.Frank Vibrans
2011-02-10According to AMD documentation, cache type WP should be used forScott Duplichan
2011-02-10Implemented workaround for erratum 169, obsoleting erratum 131.Alexandru Gagniuc
2011-02-10Fix a potential system hang by handling AMD Model F Erratum 89Josef Kellermann
2011-01-27oops. this is weird. CAR addresses should be specified in the socket and not inStefan Reinauer
2011-01-19Revert r5902 to make code more readable again. At least three people like toStefan Reinauer
2011-01-19Now that the VIA code is run above 1Meg (like other boards), it shouldKevin O'Connor
2011-01-12drop unused filesStefan Reinauer
2011-01-01Add AMD SB800 southbridge CIMx code.Kerry She
2010-12-30Remove duplicated GX2 processor IIOC mode setting on CS5535 southbridge codeNils Jacobs
2010-12-26Remove dead and unused Geode GX2 codeNils Jacobs
2010-12-26Replace Geode GX2 MSR addresses for GLCP on GLIU1 with namesNils Jacobs
2010-12-26Clean up Geode GX2 comments, whitespace and coding style. Trivial.Nils Jacobs
2010-12-18SMM on AMD K8 Part 2/2Rudolf Marek
2010-12-18SMM for AMD K8 Part 1/2Stefan Reinauer
2010-12-18Support Intel SCH (Poulsbo) and add iwave/iWRainbowG6 boardPatrick Georgi
2010-12-16- Fix shortcoming in Kconfig when handling multiple "choice"sStefan Reinauer
2010-12-12fix model 106cxStefan Reinauer
2010-12-11factor out cpu power management base into a separate file. And fix a bug inStefan Reinauer
2010-12-11After this has been brought up many times before, rename src/arch/i386 toStefan Reinauer
2010-12-08These empty files sneaked in from another patch and shouldn't have been inclu...Tobias Diedrich
2010-12-08Tobias Diedrich wrote:Tobias Diedrich
2010-12-08Move "select CACHE_AS_RAM" lines from boards into CPU socket.Uwe Hermann
2010-11-221) wraps the s3 parts of chipset code/memory init code with if CONFIG_HAVE_AC...Rudolf Marek
2010-11-22Printing coreboot debug messages on VGA console is pretty much useless, sinceStefan Reinauer
2010-11-18Eliminate SET_NB_CFG_54 option. There was no board thatPatrick Georgi
2010-11-17Move Intel power management related defines to some central location.Patrick Georgi
2010-11-16Move the SET_FIDVID* family of configuration options to Kconfig andPatrick Georgi
2010-11-13MTRR related improvements for AMD family 10h and family 0Fh systemsScott Duplichan
2010-11-09This fixes a FIXME in src/cpu/amd/mtrr/amd_mtrr.c and shuts up theTobias Diedrich
2010-11-03Clean up some more comments and white space in model_gx2/cpureginit.c.Nils Jacobs
2010-10-31Fix AMD family 10h engineering sample is reported as 'thermal test kit'.Scott Duplichan
2010-10-26reg is only used inside the #if clause, so declare it there. trivial.Patrick Georgi
2010-10-20Now that no boards set RAMBASE < 1M, get rid of some dead code. Trivial.Myles Watson
2010-10-19For AMD family 10h processors, msr c0010058 is always programmedScott Duplichan
2010-10-19Modernize socket_754 Kconfig with CAR and address bits information.Jonathan Kollasch
2010-10-19Revision 5966 changed the end of line style of the 3 modified files. This cha...Scott Duplichan
2010-10-19To reduce boot time, remove the double startup IPI and 10 ms delay from lapic...Scott Duplichan
2010-10-19When debug logging is enabled, a message such as '* AP 02 timed out:02010501'Scott Duplichan
2010-10-18update intel microcode files.Stefan Reinauer
2010-10-18Make update-microcodes.sh executable.Uwe Hermann
2010-10-17update intel microcode update scriptStefan Reinauer
2010-10-17Removes model_65x CPUIDs from model_6xx code.Keith Hui
2010-10-16Move support for Deschutes Slot 1 CPUs (model_65x) into its own directory.Keith Hui
2010-10-15Drop unused DCACHE_RAM_BASE from intel/car/cache_as_ram.inc-using sockets.Uwe Hermann
2010-10-13Move out Katmai Slot 1 CPUs (model_67x) from model_6xx to model_67x.Keith Hui
2010-10-13Convert all Intel i810 boards to CAR.Uwe Hermann
2010-10-12Add missing include of model_6bx for slot_1.Keith Hui
2010-10-12We define IO_APIC_ADDR in <arch/ioapic.h>, let's use it.Uwe Hermann
2010-10-12Reduce duplicate definition in CAR code.Warren Turkal
2010-10-11Factor out a few commonly duplicated functions from northbridge.c.Uwe Hermann
2010-10-07Remove some duplicate #include files (trivial).Uwe Hermann
2010-10-07Remove duplicate line from pci_ids.h.Jonathan Kollasch
2010-10-06Convert all Intel 440BX boards to Cache-as-RAM (CAR).Uwe Hermann
2010-10-04Add missing Intel Pentium II/III era CPU IDs.Uwe Hermann
2010-10-02Add comments to make it clear why these two lines are written like that:Uwe Hermann
2010-10-01Factor out common CAR asm snippets.Uwe Hermann
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