Age | Commit message (Expand) | Author |
2011-01-27 | oops. this is weird. CAR addresses should be specified in the socket and not in | Stefan Reinauer |
2011-01-19 | Revert r5902 to make code more readable again. At least three people like to | Stefan Reinauer |
2011-01-19 | Now that the VIA code is run above 1Meg (like other boards), it should | Kevin O'Connor |
2011-01-12 | drop unused files | Stefan Reinauer |
2011-01-01 | Add AMD SB800 southbridge CIMx code. | Kerry She |
2010-12-30 | Remove duplicated GX2 processor IIOC mode setting on CS5535 southbridge code | Nils Jacobs |
2010-12-26 | Remove dead and unused Geode GX2 code | Nils Jacobs |
2010-12-26 | Replace Geode GX2 MSR addresses for GLCP on GLIU1 with names | Nils Jacobs |
2010-12-26 | Clean up Geode GX2 comments, whitespace and coding style. Trivial. | Nils Jacobs |
2010-12-18 | SMM on AMD K8 Part 2/2 | Rudolf Marek |
2010-12-18 | SMM for AMD K8 Part 1/2 | Stefan Reinauer |
2010-12-18 | Support Intel SCH (Poulsbo) and add iwave/iWRainbowG6 board | Patrick Georgi |
2010-12-16 | - Fix shortcoming in Kconfig when handling multiple "choice"s | Stefan Reinauer |
2010-12-12 | fix model 106cx | Stefan Reinauer |
2010-12-11 | factor out cpu power management base into a separate file. And fix a bug in | Stefan Reinauer |
2010-12-11 | After this has been brought up many times before, rename src/arch/i386 to | Stefan Reinauer |
2010-12-08 | These empty files sneaked in from another patch and shouldn't have been inclu... | Tobias Diedrich |
2010-12-08 | Tobias Diedrich wrote: | Tobias Diedrich |
2010-12-08 | Move "select CACHE_AS_RAM" lines from boards into CPU socket. | Uwe Hermann |
2010-11-22 | 1) wraps the s3 parts of chipset code/memory init code with if CONFIG_HAVE_AC... | Rudolf Marek |
2010-11-22 | Printing coreboot debug messages on VGA console is pretty much useless, since | Stefan Reinauer |
2010-11-18 | Eliminate SET_NB_CFG_54 option. There was no board that | Patrick Georgi |
2010-11-17 | Move Intel power management related defines to some central location. | Patrick Georgi |
2010-11-16 | Move the SET_FIDVID* family of configuration options to Kconfig and | Patrick Georgi |
2010-11-13 | MTRR related improvements for AMD family 10h and family 0Fh systems | Scott Duplichan |
2010-11-09 | This fixes a FIXME in src/cpu/amd/mtrr/amd_mtrr.c and shuts up the | Tobias Diedrich |
2010-11-03 | Clean up some more comments and white space in model_gx2/cpureginit.c. | Nils Jacobs |
2010-10-31 | Fix AMD family 10h engineering sample is reported as 'thermal test kit'. | Scott Duplichan |
2010-10-26 | reg is only used inside the #if clause, so declare it there. trivial. | Patrick Georgi |
2010-10-20 | Now that no boards set RAMBASE < 1M, get rid of some dead code. Trivial. | Myles Watson |
2010-10-19 | For AMD family 10h processors, msr c0010058 is always programmed | Scott Duplichan |
2010-10-19 | Modernize socket_754 Kconfig with CAR and address bits information. | Jonathan Kollasch |
2010-10-19 | Revision 5966 changed the end of line style of the 3 modified files. This cha... | Scott Duplichan |
2010-10-19 | To reduce boot time, remove the double startup IPI and 10 ms delay from lapic... | Scott Duplichan |
2010-10-19 | When debug logging is enabled, a message such as '* AP 02 timed out:02010501' | Scott Duplichan |
2010-10-18 | update intel microcode files. | Stefan Reinauer |
2010-10-18 | Make update-microcodes.sh executable. | Uwe Hermann |
2010-10-17 | update intel microcode update script | Stefan Reinauer |
2010-10-17 | Removes model_65x CPUIDs from model_6xx code. | Keith Hui |
2010-10-16 | Move support for Deschutes Slot 1 CPUs (model_65x) into its own directory. | Keith Hui |
2010-10-15 | Drop unused DCACHE_RAM_BASE from intel/car/cache_as_ram.inc-using sockets. | Uwe Hermann |
2010-10-13 | Move out Katmai Slot 1 CPUs (model_67x) from model_6xx to model_67x. | Keith Hui |
2010-10-13 | Convert all Intel i810 boards to CAR. | Uwe Hermann |
2010-10-12 | Add missing include of model_6bx for slot_1. | Keith Hui |
2010-10-12 | We define IO_APIC_ADDR in <arch/ioapic.h>, let's use it. | Uwe Hermann |
2010-10-12 | Reduce duplicate definition in CAR code. | Warren Turkal |
2010-10-11 | Factor out a few commonly duplicated functions from northbridge.c. | Uwe Hermann |
2010-10-07 | Remove some duplicate #include files (trivial). | Uwe Hermann |
2010-10-07 | Remove duplicate line from pci_ids.h. | Jonathan Kollasch |
2010-10-06 | Convert all Intel 440BX boards to Cache-as-RAM (CAR). | Uwe Hermann |
2010-10-04 | Add missing Intel Pentium II/III era CPU IDs. | Uwe Hermann |
2010-10-02 | Add comments to make it clear why these two lines are written like that: | Uwe Hermann |
2010-10-01 | Factor out common CAR asm snippets. | Uwe Hermann |
2010-10-01 | Cosmetics, whitespace and coding-style fixes for Intel CAR (trivial). | Uwe Hermann |
2010-10-01 | Fix some breakage from 5890. | Myles Watson |
2010-10-01 | fix VIA C7 code. | Stefan Reinauer |
2010-10-01 | Add missing parenthesis (trivial). | Uwe Hermann |
2010-10-01 | CAR simplifications, typos, readability improvements (trivial). | Uwe Hermann |
2010-09-30 | Various cosmetic and coding style fixes in CAR code (trivial). | Uwe Hermann |
2010-09-30 | Use existing, readable MTRR #defines instead of hardcoding numbers. | Uwe Hermann |
2010-09-30 | Rename build system variables to be more intuitive, and | Patrick Georgi |
2010-09-30 | fix Kontron KT690 and clean up socket S1G1 boards accordingly. | Stefan Reinauer |
2010-09-30 | Move CAR settings to board config for socket 940 boards. | Warren Turkal |
2010-09-30 | Move VIA C7 board CAR config to VIA C7 instead of boards. | Warren Turkal |
2010-09-29 | Forgot to 'svn add' src/cpu/x86/name (trivial). | Uwe Hermann |
2010-09-29 | Factor out fill_processor_name() and strcpy() functions. | Uwe Hermann |
2010-09-27 | All these boards already had the CACHE_AS_RAM option in their individual | Warren Turkal |
2010-09-27 | Move CAR config from mainboard to CPU config for AMD GX2 boards. | Warren Turkal |
2010-09-27 | This patch moves one of the CAR configs to the socket from the single | Warren Turkal |
2010-09-27 | drop some dead code from model_fxx_init.c | Stefan Reinauer |
2010-09-27 | Add a few missing license headers based on svn logs, and also add a | Uwe Hermann |
2010-09-27 | drop double include (trivial) | Stefan Reinauer |
2010-09-26 | drop some more unneeded ../../.. | Stefan Reinauer |
2010-09-26 | Normalize the config option for the Intel Atom CPU. | Warren Turkal |
2010-09-26 | dumpmmcr utility is available under util and shares most of the code. | Stefan Reinauer |
2010-09-25 | Drop <cpu/amd/mtrr.h> #include from Intel CPUs. | Uwe Hermann |
2010-09-25 | - Fix race condition in option_table.h generation by moving the include | Stefan Reinauer |
2010-09-23 | Whitespace/typo/cosmetic fixes (trivial). | Uwe Hermann |
2010-09-17 | Clear bit 35 of msr c001_102a in Fam10 rev C cores. | Arne Georg Gleditsch |
2010-09-16 | Add more Fam10 CPUID strings from the AMD revision guide. Includes | Marc Jones |
2010-09-14 | This patch corrects a coding error in the original implementation | Scott Duplichan |
2010-09-13 | CONFIG_MMCONF_SUPPORT is always defined. Fix build. | Myles Watson |
2010-09-13 | Move initialization of MMCONF BAR to cache_as_ram setup phase, in order | Arne Georg Gleditsch |
2010-09-10 | Move memory type information out of some AMD sockets. | Myles Watson |
2010-09-09 | Adapt comment, too. (trivial) | Patrick Georgi |
2010-09-09 | Please find appended. This patch gets rid of the %gs magic altogether, | Arne Georg Gleditsch |
2010-09-09 | Apparently, it's not crucial to clear this at the exact moment we switch | Arne Georg Gleditsch |
2010-09-08 | Trivial - remove stray characters from a comment block. | Marc Jones |
2010-09-08 | Make timer2 the default choice for TSC initialization. | Patrick Georgi |
2010-09-08 | It should not be necessary to read in the rom during CAR setup. | Kevin O'Connor |
2010-09-07 | 2ms is enough time to accurately obtain the clock rate. | Kevin O'Connor |
2010-09-07 | Set up an arbitrary amount of system memory on Geode LX, so | Aurelien Guillaume |
2010-08-30 | We call this cache as ram everywhere, so let's call it the same in Kconfig | Stefan Reinauer |
2010-08-30 | mPGA479M Sockets can take Intel Mobile Celeron. | Andreas Schultz |
2010-08-22 | I've checked Revision Guide for AMD Family10h processors (#41322) rev | Xavi Drudis Ferran |
2010-08-22 | RB_C3 should also apply the workaround for errata 354, according to | Xavi Drudis Ferran |
2010-08-22 | RB_C3 and HY-D0 should also apply the workaround for errata 344, according to | Xavi Drudis Ferran |
2010-08-22 | Complete code for errata 343. Revision Guide for AMD Family10h | Xavi Drudis Ferran |
2010-08-22 | Include RB_C3 in erratum 346 | Xavi Drudis Ferran |
2010-08-22 | Add RB_C3 to AMD_FAM10_ALL so that it gets its MSR right for mtrs, ht, etc. | Xavi Drudis Ferran |