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path: root/src/cpu
AgeCommit message (Expand)Author
2013-01-11AMD: Set the mask of MTRR according to CONFIG_CPU_ADDR_BITSZheng Bao
2013-01-10armv7: update board_init_f function signatureDavid Hendricks
2013-01-10armv7: delete some unused filesDavid Hendricks
2013-01-10exynos5250: clean-ups for clock_initDavid Hendricks
2013-01-10exynos5250: un-comment a lot of code which was left out earlierDavid Hendricks
2013-01-05ARMv7: drop __ASSEMBLY__Stefan Reinauer
2013-01-04cleanup some exynos5250 uart codeDavid Hendricks
2013-01-04make early serial console support more genericDavid Hendricks
2013-01-03snow: Stuff to support building image with BL1David Hendricks
2013-01-03Add (hacked-up) s3c24x0_i2c filesDavid Hendricks
2013-01-03import SPL files for board_i2c_{claim,release}_bus()David Hendricks
2012-12-29move iRAM config variable to exynos5250 KconfigDavid Hendricks
2012-12-12Claim the SPI bus before writes if the IMC ROM is presentMartin Roth
2012-12-12Fix up Maxim MAX77686 driverStefan Reinauer
2012-12-11Remove un-needed i2c.h includeRonald G. Minnich
2012-12-11Correct the location of the include fileRonald G. Minnich
2012-12-10Removed an unneeded include fileRonald G. Minnich
2012-12-08WIP: Initial support for Samsung Exynos 5250 ARM CPUStefan Reinauer
2012-12-06Unify assembler function handlingStefan Reinauer
2012-12-01Add include files for samsung s5p-commonRonald G. Minnich
2012-11-30AMD S3: Leverage the public SPI routineZheng Bao
2012-11-29Minor changes to .h files for samsung ARM partRonald G. Minnich
2012-11-28Remove assembly coded log2 functionRonald G. Minnich
2012-11-28add .h files for common exynos 5Ronald G. Minnich
2012-11-28Add .h files for samsung exynos 5250Ronald G. Minnich
2012-11-28amdk8/amdfam10: Use CAR_GLOBAL for sysinfoPatrick Georgi
2012-11-27Remove AMD special case for LAPIC based udelay()Patrick Georgi
2012-11-27Get rid of drivers classPatrick Georgi
2012-11-27intel/i82801ix: new southbridge, ICH9Patrick Georgi
2012-11-20Unify use of bool config variablesStefan Reinauer
2012-11-20secondary.S: Fix dropping ramstage.aStefan Reinauer
2012-11-20Make sure only one udelay function is availableStefan Reinauer
2012-11-16Clean up KconfigStefan Reinauer
2012-11-13Add spinlock to serialize Intel microcode updatesStefan Reinauer
2012-11-13Clean up stack checking codeStefan Reinauer
2012-11-13clean up lapic_cpu_init.cStefan Reinauer
2012-11-13Pass the CPU index as a parameter to startup.Ronald G. Minnich
2012-11-13Fix CONFIG_MAX_CPU set to 1 CPU build problemStefan Reinauer
2012-11-13Support better tracking of AP stack usage.Ronald G. Minnich
2012-11-12ivybridge: Catch unknown CPU revisionsStefan Reinauer
2012-11-12Fix gcc-4.7 building problem.Han Shen
2012-11-12Initialize the VMX MSRMarc Jones
2012-11-12Revert "Remove code that enables/disables VMX in coreboot on chromebooks."Marc Jones
2012-11-12sandybridge: Correct reporting of cores and threadsStefan Reinauer
2012-11-07Leave power control registers unlockedSameer Nanda
2012-11-06cpu/intel/model_1067x: Add proper c-state/p-state/thermal supportNico Huber
2012-11-06intel/socket_BGA956: enable speedstep, CAR, MMX, SSEPatrick Georgi
2012-11-05Overhaul speedstep codeNico Huber
2012-11-05Fix some indentation flaws and break very long linesNico Huber
2012-11-02AMD agesa: add enable cache at the end of disable_cache_as_ramSiyuan Wang
2012-11-02Correct FSB reading in speedstep ACPINico Huber
2012-11-01Merge cpu/intel/acpi.h into cpu/intel/speedstep.hNico Huber
2012-10-30Add support for socket LGA775Stefan Tauner
2012-10-07Fix typo in mPGA603 socketKyösti Mälkki
2012-10-07Remove chip.h files without config structureKyösti Mälkki
2012-09-19C32 legacy code: change CONFIG_CPU_AMD_SOCKET_C32 to CONFIG_CPU_AMD_SOCKET_C3...Siyuan Wang
2012-09-05VIA Nano: Add support for VIA Nano CPUsAlexandru Gagniuc
2012-09-05buildsystem: Make CPU microcode updating more configurableAlexandru Gagniuc
2012-08-27Intel model_106cx: change CAR to HT-capableKyösti Mälkki
2012-08-22Auto-declare chip_operationsKyösti Mälkki
2012-08-09Replicate TOP_MEM and TOP_MEM2 from BSP to AP CPUKyösti Mälkki
2012-08-09AMD northbridge: copy TOP_MEM and TOP_MEM2 for distributionKyösti Mälkki
2012-08-09Synchronize rdtsc instructionsStefan Reinauer
2012-08-07Move cpus_ready_for_init() to AMD K8Kyösti Mälkki
2012-08-05AMD S3: Remove the hardcoded volatile positionzbao
2012-08-04Make the device tree available in the rom stageStefan Reinauer
2012-08-03Intel CPUs: Fix counting of CPU coresKyösti Mälkki
2012-08-01Intel Sandybridge: add reserved memory as resourcesKyösti Mälkki
2012-07-31Revert "Use broadcast SIPI to startup siblings"Sven Schnelle
2012-07-31Revert "remove CONFIG_SERIAL_CPU_INIT"Sven Schnelle
2012-07-26CPU: Add option to set TCC activation offsetDuncan Laurie
2012-07-26ACPI: Add a method to notify OS to re-read _PPCDuncan Laurie
2012-07-26ACPI: Add function to write _PPC using NVSDuncan Laurie
2012-07-26USBDEBUG: buffer up to 8 bytesSven Schnelle
2012-07-26Drop CONFIG_CPU_MODEL_NAME and fix CPU name displayed in logsStefan Reinauer
2012-07-26Enable Microcode in CBFS for all SandyBridge/IvyBridge systemsStefan Reinauer
2012-07-25SMM: Fix state table for Intel Core2 CPUsStefan Reinauer
2012-07-25Fix comment to reference IvyBridge, tooStefan Reinauer
2012-07-25Include SandyBridge Microcode when IvyBridge is enabledStefan Reinauer
2012-07-25Fix date output in Microcode updateStefan Reinauer
2012-07-25Fix LAPIC timer on Ivy Bridge systemsStefan Reinauer
2012-07-24CPU: Set flex ratio to nominal TDP ratio in bootblockDuncan Laurie
2012-07-24SMM: Fix state save map for sandybridge and TSEGDuncan Laurie
2012-07-24SMM: Add heap region and move C handler higher in regionDuncan Laurie
2012-07-24CPU: Update ivybridge PP1 current limit valueDuncan Laurie
2012-07-24CPU: Add basic support for Nominal Configurable TDPDuncan Laurie
2012-07-24Rename cache_lbmem() to cache_ramstage()Stefan Reinauer
2012-07-24Config changes to support microcode in CBFSVadim Bendebury
2012-07-24Add microcode blob processingVadim Bendebury
2012-07-24Add code to read Intel microcode from CBFSVadim Bendebury
2012-07-24Make MAX_PHYSICAL_CPUS invisible on non-AMD boardsStefan Reinauer
2012-07-24Rename microcode include file to be model agnosticVadim Bendebury
2012-07-24Properly identify ACPI C3 states in _CST table.Duncan Laurie
2012-07-24Remove code that enables/disables VMX in coreboot on chromebooks.Ronald G. Minnich
2012-07-24MTRR: drop repetetive debug messageStefan Reinauer
2012-07-23Re-initialize Local APIC timer on APsStefan Reinauer
2012-07-22AMD CPUs: Updated CPU list in powernow_acpi.cJukka Rantala
2012-07-18AMD northbridges: drop dead codeKyösti Mälkki
2012-07-16AMD: Fix GFXUMA with 4GB or more RAMKyösti Mälkki
2012-07-16AMD MTRR: fix rounding and renamesKyösti Mälkki
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