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path: root/src/cpu/x86
AgeCommit message (Expand)Author
2014-02-06MTRR: Mark all prefetchable resources as WRCOMB.Vladimir Serbinenko
2014-02-06mtrr: retry fitting w/o WRCOMB if usage exceeds BIOS allocationAaron Durbin
2014-01-30x86: Add SMM helper functions to MP infrastructureAaron Durbin
2014-01-30x86: parallel MP initializationAaron Durbin
2014-01-28x86: add common definitions for control registersAaron Durbin
2014-01-26src/cpu: Fix spelling of MTTR to MTRRPaul Menzel
2014-01-15Re-declare CACHE_ROM_SIZE as aligned ROM_SIZE for MTRRKyösti Mälkki
2013-12-26AMD boards (non-AGESA): Cleanup earlymtrr.c includesKyösti Mälkki
2013-12-04Update SMM for FSP systemsMarc Jones
2013-11-25Support for nehalem northbridgeVladimir Serbinenko
2013-11-25Support for Ibexpeak southbridgeVladimir Serbinenko
2013-11-24smi: Update mainboard_smi_gpi() to have 32bit argumentDuncan Laurie
2013-11-22Don't wait on 2065xVladimir Serbinenko
2013-10-14Revert "CBMEM: Always have early initialisation"Kyösti Mälkki
2013-10-13Rename cpu/x86/car.h to arch/early_variables.hStefan Reinauer
2013-10-03cpu/x86/mtrr/mtrr.c: Remove superfluous assignment to `type_index`Paul Menzel
2013-09-21CBMEM: Always select CAR_MIGRATIONKyösti Mälkki
2013-08-23usbdebug: Do not support logging from SMMKyösti Mälkki
2013-08-15Include boot_cpu.c for romstage buildsKyösti Mälkki
2013-07-22X86: make the SIPI num_starts a config variableRonald G. Minnich
2013-07-11cpu: Fix spellingMartin Roth
2013-06-22Do CAR variable migration only onceAaron Durbin
2013-06-13Revert "Add support for Intel Ibex Peak (Mobile 5) southbridge"Stefan Reinauer
2013-06-12Add support for Intel Ibex Peak (Mobile 5) southbridgeStefan Reinauer
2013-05-16x86: add cache-as-ram migration optionAaron Durbin
2013-05-14x86: add thread supportAaron Durbin
2013-05-07x86: harden tsc udelay() functionAaron Durbin
2013-05-07x86: add TSC_CONSTANT_RATE optionAaron Durbin
2013-05-01tsc: provide monotonic timerAaron Durbin
2013-05-01lapic: monotonic time implementationAaron Durbin
2013-05-01x86: use boot state callbacks to disable rom cacheAaron Durbin
2013-04-04AMD: Drop six copies of wrmsr_amd and rdmsr_amdKyösti Mälkki
2013-04-01boot: add disable_cache_rom() functionAaron Durbin
2013-03-29x86: mtrr: optimize hole carving above 4GiBAaron Durbin
2013-03-29x86: mtrr: add hole punching supportAaron Durbin
2013-03-29x86: add rom cache variable MTRR index to tablesAaron Durbin
2013-03-29x86: mtrr: add CONFIG_CACHE_ROM supportAaron Durbin
2013-03-29mtrr: honor IORESOURCE_WRCOMBAaron Durbin
2013-03-29x86: add new mtrr implementationAaron Durbin
2013-03-22x86: unify amd and non-amd MTRR routinesAaron Durbin
2013-03-22x86: Unify arch/io.h and arch/romcc_io.hStefan Reinauer
2013-03-21ramstage: prepare for relocationAaron Durbin
2013-03-18SMM: link against libgccStefan Reinauer
2013-03-18haswell: lapic timer supportAaron Durbin
2013-03-18haswell: Use SMM ModulesAaron Durbin
2013-03-15Google Link: Add remaining code to support native graphicsRonald G. Minnich
2013-03-14x86: SMM Module SupportAaron Durbin
2013-03-14haswell: Add initial support for Haswell platformsAaron Durbin
2013-03-08Eliminate do_div().David Hendricks
2013-03-01GPLv2 notice: Unify all files to just use one space in »MA 02110-1301«Paul Menzel
2013-02-27smm: Update rev 0x30101 SMM revision save stateAaron Durbin
2013-02-11Intel: Replace MSR 0xcd with MSR_FSB_FREQPatrick Georgi
2012-12-06Unify assembler function handlingStefan Reinauer
2012-11-27Remove AMD special case for LAPIC based udelay()Patrick Georgi
2012-11-27intel/i82801ix: new southbridge, ICH9Patrick Georgi
2012-11-20secondary.S: Fix dropping ramstage.aStefan Reinauer
2012-11-20Make sure only one udelay function is availableStefan Reinauer
2012-11-13Clean up stack checking codeStefan Reinauer
2012-11-13clean up lapic_cpu_init.cStefan Reinauer
2012-11-13Pass the CPU index as a parameter to startup.Ronald G. Minnich
2012-11-13Support better tracking of AP stack usage.Ronald G. Minnich
2012-11-12Fix gcc-4.7 building problem.Han Shen
2012-08-09Synchronize rdtsc instructionsStefan Reinauer
2012-08-07Move cpus_ready_for_init() to AMD K8Kyösti Mälkki
2012-08-01Intel Sandybridge: add reserved memory as resourcesKyösti Mälkki
2012-07-31Revert "Use broadcast SIPI to startup siblings"Sven Schnelle
2012-07-31Revert "remove CONFIG_SERIAL_CPU_INIT"Sven Schnelle
2012-07-26USBDEBUG: buffer up to 8 bytesSven Schnelle
2012-07-25SMM: Fix state table for Intel Core2 CPUsStefan Reinauer
2012-07-25Fix LAPIC timer on Ivy Bridge systemsStefan Reinauer
2012-07-24SMM: Fix state save map for sandybridge and TSEGDuncan Laurie
2012-07-24SMM: Add heap region and move C handler higher in regionDuncan Laurie
2012-07-24Rename cache_lbmem() to cache_ramstage()Stefan Reinauer
2012-07-24MTRR: drop repetetive debug messageStefan Reinauer
2012-07-23Re-initialize Local APIC timer on APsStefan Reinauer
2012-07-16Check for IORESOURCE_UMA_FB in MTRR setupKyösti Mälkki
2012-07-16Define global uma_memory variablesKyösti Mälkki
2012-07-12Drop Kconfig VAR_MTRR_HOLE optionKyösti Mälkki
2012-07-12Fix stack assignment during CPU initializationSven Schnelle
2012-07-05Only copy real-mode section of SIPI vectorKyösti Mälkki
2012-07-05Fix the CPU index parameter passed to secondary_cpu_init().Kyösti Mälkki
2012-07-02remove CONFIG_SERIAL_CPU_INITSven Schnelle
2012-07-02Use broadcast SIPI to startup siblingsSven Schnelle
2012-06-12udelay: add missing bus frequencySven Schnelle
2012-05-30Fix the location of "Setting variable MTRR" printk.Denis 'GNUtoo' Carikli
2012-05-08Some more #if cleanupPatrick Georgi
2012-05-08Clean up #ifsPatrick Georgi
2012-04-20Revert wbind added to the reset_vectorMarc Jones
2012-04-11Remove obsolete empy macro definitionRon Minnich
2012-04-06Fixes and Sandybridge support for lapic cpu initStefan Reinauer
2012-04-06Add Sandybridge/Cougar Point support to SMM relocation handlerStefan Reinauer
2012-04-06Cache 8MB flash instead of 4MBStefan Reinauer
2012-04-05Fix timer frequency detection on SandybridgeStefan Reinauer
2012-04-05Invalidate cache before first jumpStefan Reinauer
2012-04-05Update documentation in smmrelocate.S to mention TSEGStefan Reinauer
2012-04-04Add support to run SMM handler in TSEG instead of ASEGStefan Reinauer
2012-03-30Make MTRR min hole alignment 64MBDuncan Laurie
2012-03-30Fix MB calculation in the reporting of the MTRR holeDuncan Laurie
2012-03-30MTRR: add alternate allocation method for odd memory mapsDuncan Laurie
2012-03-30Add Kconfig options to enable TSEG and set a sizeDuncan Laurie
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