index
:
coreboot.git
macbookair5_2
macbookpro10_1
main
master
mbp101_medisable
mbp101_medisable_1
mbp82
x230
my copy of coreboot
User &
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
src
/
cpu
/
x86
/
tsc
/
Makefile.inc
Age
Commit message (
Expand
)
Author
2020-06-23
src/*: Update makefiles to exclude x86 code from psp-verstage
Martin Roth
2019-11-03
cpu/x86/tsc: Flip and rename TSC_CONSTANT_RATE to UNKNOWN_TSC_RATE
Kyösti Mälkki
2019-07-09
arch/x86: Avoid HAVE_SMI_HANDLER conditional with smm-class
Kyösti Mälkki
2016-04-11
cpu/x86/tsc: Compile TSC timer for postcar as well
Andrey Petrov
2016-02-11
cpu/x86/tsc: Compile delay_tsc.c for the bootblock as well
Alexandru Gagniuc
2015-10-14
x86: add standalone verstage support
Aaron Durbin
2014-07-17
cpu,Makefile.inc: Trivial - drop trailing blank lines at EOF
Edward O'Callaghan
2013-05-07
x86: add TSC_CONSTANT_RATE option
Aaron Durbin
2010-09-30
Rename build system variables to be more intuitive, and
Patrick Georgi
2010-01-04
- use LAPIC timer if selected (instead of TSC all the time) [kconfig]
Patrick Georgi
2009-08-29
This is the final set of changes to allow rumba to build. Rumba is not
Ronald G. Minnich
2009-08-25
Various Kconfig and Makefile.inc fixes and cosmetics.
Uwe Hermann
2009-08-12
Kconfig!
Patrick Georgi