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path: root/src/cpu/x86/lapic/lapic.c
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2020-10-31cpu/x86/lapic: rename virtual wire mode initialization functionFelix Held
Clarify what the function does by renaming it from do_lapic_init() to lapic_virtual_wire_mode_init(). Change-Id: Ie4430bf0f6c6bf0081b6aaeace351092bcf7f4ac Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47020 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-by: Nico Huber <nico.h@gmx.de>
2020-06-22cpu/x86/lapic: Support x86_64 and clean up codePatrick Rudolph
Most LAPIC registers are 32bit, and thus the use of long is valid on x86_32, however it doesn't work on x86_64. * Don't use long as it is 64bit on x86_64, which breaks interrupts in QEMU and thus SeaBIOS wouldn't time out the boot menu * Get rid of unused defines * Get rid of unused atomic xchg code Tested on QEMU Q35 with x86_64 enabled: Interrupts work again. Tested on QEMU Q35 with x86_32 enabled: Interrupts are still working. Tested on Lenovo T410 with x86_64 enabled. Change-Id: Iaed1ad956d090625c7bb5cd9cf55cbae16dd82bd Signed-off-by: Patrick Rudolph <siro@das-labor.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/36777 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-06-16Revert "x86/lapic: Set EXTINT on BSP only"Angel Pons
This reverts commit aac79e0b8f4777f8a912ccdfc483755b7a4da52c. Reason for revert: This massively slows down the boot process because the LAPIC delivery mode for the APs is not set anymore. Plus, not all review comments were fully addressed, yet this got merged in anyway. Change-Id: If9bae6aae0d4d1f21b067a7d970975193c2b16d5 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/42166 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Raul Rangel <rrangel@chromium.org>
2020-06-16x86/lapic: Set EXTINT on BSP onlyZheng Bao
When Linux is booted, the kernel reports "do_IRQ: 1.55 No irq handler for vector" So far it comes with payloads SeaBIOS and depthcharge, not with Grub. We assume Grub does something to avoid this problem. AMD bug tracker system (JIRA PLAT-21393) says the APs can not be set EXTINT delivery mode. In Intel 64 and IA-32 Architectures Software Developer’s Manual volume 3A, see chapter 10.5.1 Local Vector Table, it says: "The APIC architecture supports only one ExtINT source in a system, usually contained in the compatibility bridge. Only one processor in the system should have an LVT entry configured to use the ExtINT delivery mode." Tested on mandolin (Picasso) board, the error in dmesg is gone. The bug 153677727 has two parts. 1. Soft lockup 2. do_IRQ 1.55. The soft lockup issued has been fixed by https://review.coreboot.org/c/coreboot/+/41128 BUG=b:153677727 TEST=mandolin Change-Id: I2956dcaad87cc1466deeca703748de33390b7603 Signed-off-by: Zheng Bao <zheng.bao@amd.com> Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/42219 Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-05-11treewide: Remove "this file is part of" linesPatrick Georgi
Stefan thinks they don't add value. Command used: sed -i -e '/file is part of /d' $(git grep "file is part of " |egrep ":( */\*.*\*/\$|#|;#|-- | *\* )" | cut -d: -f1 |grep -v crossgcc |grep -v gcov | grep -v /elf.h |grep -v nvramtool) The exceptions are for: - crossgcc (patch file) - gcov (imported from gcc) - elf.h (imported from GNU's libc) - nvramtool (more complicated header) The removed lines are: - fmt.Fprintln(f, "/* This file is part of the coreboot project. */") -# This file is part of a set of unofficial pre-commit hooks available -/* This file is part of coreboot */ -# This file is part of msrtool. -/* This file is part of msrtool. */ - * This file is part of ncurses, designed to be appended after curses.h.in -/* This file is part of pgtblgen. */ - * This file is part of the coreboot project. - /* This file is part of the coreboot project. */ -# This file is part of the coreboot project. -# This file is part of the coreboot project. -## This file is part of the coreboot project. --- This file is part of the coreboot project. -/* This file is part of the coreboot project */ -/* This file is part of the coreboot project. */ -;## This file is part of the coreboot project. -# This file is part of the coreboot project. It originated in the - * This file is part of the coreinfo project. -## This file is part of the coreinfo project. - * This file is part of the depthcharge project. -/* This file is part of the depthcharge project. */ -/* This file is part of the ectool project. */ - * This file is part of the GNU C Library. - * This file is part of the libpayload project. -## This file is part of the libpayload project. -/* This file is part of the Linux kernel. */ -## This file is part of the superiotool project. -/* This file is part of the superiotool project */ -/* This file is part of uio_usbdebug */ Change-Id: I82d872b3b337388c93d5f5bf704e9ee9e53ab3a9 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/41194 Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-04-04src/cpu: Use SPDX for GPL-2.0-only filesAngel Pons
Done with sed and God Lines. Only done for C-like code for now. Change-Id: I2adf28d805fe248d55a9514f74c38280c0ad9a78 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/40049 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
2019-05-28src/cpu/x86/lapic/lapic.c: Add missing newlineChristian Walter
Added missing new line to Info Output. Change-Id: Ic4cd63f231de918fad7cd34724651bf8eb1c8e62 Signed-off-by: Christian Walter <christian.walter@9elements.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/32987 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2018-06-01src/cpu: Remove unneeded includesElyes HAOUAS
Change-Id: I8fb03ada29b37f96fb02122462dfb8ec7faa9d31 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/26732 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
2017-08-19arch/x86: Fix ugly NEED_LAPIC useKyösti Mälkki
Change-Id: I2d6fdfd0465fe5f558daa04c6f980f7226596b55 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/21087 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2017-03-16cpu/x86: Fix various issues detected by checkpatch.plLee Leahy
Fix the following errors and warning detected by checkpatch.pl: ERROR: spaces required around that '=' (ctx:VxV) ERROR: space prohibited after that open parenthesis '(' ERROR: need consistent spacing around '|' (ctx:WxV) ERROR: need consistent spacing around '|' (ctx:VxW) ERROR: spaces required around that '=' (ctx:VxV) ERROR: spaces required around that '==' (ctx:VxV) ERROR: spaces required around that ':' (ctx:ExV) WARNING: space prohibited between function name and open parenthesis '(' TEST=Build and run on Galileo Gen2 Change-Id: I61d08055b207c607d5b7d72b0094ad8e24fbd106 Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com> Reviewed-on: https://review.coreboot.org/18840 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2017-02-22src/cpu/x86: Update/Add license headers to all filesMartin Roth
Change-Id: I436bf0e7db008ea78e29eaeef10bea101e6c8922 Signed-off-by: Martin Roth <martinroth@google.com> Reviewed-on: https://review.coreboot.org/18405 Tested-by: build bot (Jenkins) Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
2016-08-23src/cpu: Capitalize CPU, APIC and IOAPIC typo fixElyes HAOUAS
Change-Id: I82e0736dc6b44cfcc57cdfdc786c85c4b6882260 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/16276 Tested-by: build bot (Jenkins) Reviewed-by: Omar Pakker
2014-08-03cpu/x86/lapic/lapic.c: trivial: fix comment on #elseDaniele Forsi
The preprocessor symbol has only one "L". Change-Id: I3ec302f18d3bcc81bb45a9d53140f8aedd019317 Signed-off-by: Daniele Forsi <dforsi@gmail.com> Reviewed-on: http://review.coreboot.org/6469 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2010-04-27Since some people disapprove of white space cleanups mixed in regular commitsStefan Reinauer
while others dislike them being extra commits, let's clean them up once and for all for the existing code. If it's ugly, let it only be ugly once :-) Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5507 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-03-22printk_foo -> printk(BIOS_FOO, ...)Stefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5266 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-02-09Remove some warnings, mainly from format strings which didn't match theMyles Watson
arguments. Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3931 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-10-04AMD Rev F supportYinghai Lu
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2435 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-10-14- Add new cvs code to cvsEric Biederman
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1657 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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