coreboot.git - my copy of coreboot

Age	Commit message (Collapse)	Author
2013-02-15	Exynos5: Drop S5P directory and merge files	Stefan Reinauer
	s5p-common mostly contained duplicate files, drop the whole directory and merge the few pieces that we are using into exynos5-common. Change-Id: I5f18e8a6d2379d719ab6bbbf817fe15bda70d17f Signed-off-by: Stefan Reinauer <reinauer@google.com> Reviewed-on: http://review.coreboot.org/2405 Tested-by: build bot (Jenkins) Reviewed-by: David Hendricks <dhendrix@chromium.org>
2013-02-15	Exynos: Drop unused include files	Stefan Reinauer
	Change-Id: Ib533938446a289167725f5beda77c2ee5236e8a5 Signed-off-by: Stefan Reinauer <reinauer@google.com> Reviewed-on: http://review.coreboot.org/2395 Reviewed-by: David Hendricks <dhendrix@chromium.org> Tested-by: build bot (Jenkins)
2013-02-14	Exynos: Drop duplicate copy of watchdog.h	Stefan Reinauer
	Change-Id: I4c9bfa9eb7708420dc42c16bc152d761d2bdfee3 Signed-off-by: Stefan Reinauer <reinauer@google.com> Reviewed-on: http://review.coreboot.org/2391 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-02-13	armv7/exynos: remove some stale files leftover from initial import	David Hendricks
	This removes some files leftover from the initial port. Some are leftover from U-Boot and some were leftover from the skeleton code derived from x86. There's a bit more that we'll get in another sweep. Change-Id: I325793ecb902b3b9430dcf531714ce025d201de6 Signed-off-by: David Hendricks <dhendrix@chromium.org> Reviewed-on: http://review.coreboot.org/2380 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2013-02-10	armv7/snow: Remove unused modules in bootblock and romstage.	Hung-Te Lin
	For Exynos/snow, cpu_info and power modules and also some parts of the GPIO API (which require timer and pwm modules) are not used in the current bootblock. Clock init only needs to be used if early console is enabled. Now our bootblock is 22420 bytes with early serial console and 11192 bytes without. Those include the 8KB BL1 region. Change-Id: I9c958dafb9cf522df0dcfbef373ce741aa162544 Signed-off-by: Hung-Te Lin <hungte@chromium.org> Signed-off-by: David Hendricks <dhendrix@chromium.org> Reviewed-on: http://review.coreboot.org/2322 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-02-07	armv7/snow: Remove power_init from bootblock.	Hung-Te Lin
	The power_init is not required on Exynos 5250 (snow) in bootblock stage. To get a cleaner and faster bootblock, we can remove it. Note, power_init internally calls max77686 and s3c24x0_i2c, so both files are also removed. Verified to boot on armv7/snow. Change-Id: I5b15dfe5ac7bf4650565fea0afefc94a228ece29 Signed-off-by: Hung-Te Lin <hungte@chromium.org> Reviewed-on: http://review.coreboot.org/2317 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-02-07	armv7: Clean up arm/snow bootblock build process.	Hung-Te Lin
	Remove duplicated / testing code and share more driver for bootblock, romstage and ramstage. The __PRE_RAM__ is now also defined in bootblock build stage, since bootblock is executed before RAM is initialized. Change-Id: I4f5469b1545631eee1cf9f2f5df93cbe3a58268b Signed-off-by: Hung-Te Lin <hungte@chromium.org> Reviewed-on: http://review.coreboot.org/2282 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-02-06	armv7: Clean up: remove deprecated SPL.	Hung-Te Lin
	"SPL" from U-Boot is deprecated by bootblock in coreboot/arm, so we don't need it anymore. Change-Id: Id16877075d0b870839a10160073ad70777a2af0a Signed-off-by: Hung-Te Lin <hungte@chromium.org> Reviewed-on: http://review.coreboot.org/2297 Tested-by: build bot (Jenkins) Reviewed-by: David Hendricks <dhendrix@chromium.org> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2013-02-06	exynos/snow: Move core/memory clock-related and board ID code	David Hendricks
	This patch moves ARM core and DRAM timing functions around to simplify the dependencies for system_clock_init(). The original code was architected such that the system_clock_init() function called other functions to obtain core and memory timings. Due to the way memory timing information must be obtained on Snow, which entails decoding platform-specific board straps, the bottom- up approach resulted in having the low-level clock init code implicitly depend on board and vendor-specific info: main() ->system_clock_init() -> get_arm_ratios() -> CPU-specific code -> clock_get_mem_timings() -> board_get_revision() -> read GPIOs (3-state logic) -> Decode GPIOs in a vendor-specific manner -> Choose memory timings from module-specific look-up table ...then proceed to init clocks ...come back to main() The new approach gathers all board and vendor-specific info in a more appropriate location and passes it into system_clock_init(): main() -> get_arm_ratios() -> CPU-specific code -> get_mem_timings() -> board_get_config() -> read GPIOs (3-state logic) -> Decode GPIOs in a vendor-specific manner -> Choose memory timings from module-specific look-up table -> system_clock_init() ...back to main() Change-Id: Ie237ebff76fc2d8a4d2f4577a226ac3909e4d4e8 Signed-off-by: David Hendricks <dhendrix@chromium.org> Reviewed-on: http://review.coreboot.org/2271 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2013-02-06	snow: use bootblock build class for I2C code	David Hendricks
	This gets rid of a bunch of duplicate I2C code in the bootblock. Change-Id: I51f625a0f738cca4ed2453fbcb78092e4110bc7e Signed-off-by: David Hendricks <dhendrix@chromium.org> Reviewed-on: http://review.coreboot.org/2289 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-02-06	snow: use bootblock build class for GPIO	David Hendricks
	This gets rid of a bunch of copy + pasted GPIO code. Change-Id: I548b2b5d63642a9da185eb7b34f80cbebf9b124f Signed-off-by: David Hendricks <dhendrix@chromium.org> Reviewed-on: http://review.coreboot.org/2288 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-02-04	exynos/snow: get rid of board-specific arbitration code	David Hendricks
	Snow's AP, EC, PMU, and smarty battery share a bus. Both the AP and EC can act as a master, so to avoid conflicts an arbitration mechanism consisting of two GPIOs is used. By default, the AP "owns" the bus unless it is off (in which case the EC doesn't monitor the arbitration pins). This means the boot firmware does not need to worry about these lines. The payload may if it needs to communicate with the EC, though. In any case, board-specific bus arbitration logic does not belong in a low-level driver that is supposed to be generic for an entire CPU family. If the payload needs to talk to the EC, we'll deal with it there. Change-Id: I0774d4592af2b21b6ad668441532c5ceab988404 Signed-off-by: David Hendricks <dhendrix@chromium.org> Reviewed-on: http://review.coreboot.org/2272 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-02-04	exynos/snow: partial clean-up of snow bootblock using build class	David Hendricks
	This removes some duplicate code from Snow's mainboard bootblock by utilizing the bootblock build class. Change-Id: I153247370a8c5127260082dcdca3ebdc5e104fb8 Signed-off-by: David Hendricks <dhendrix@chromium.org> Reviewed-on: http://review.coreboot.org/2270 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-02-04	exynos/s5p: Add helper function for reading a single MVL3 GPIO	David Hendricks
	This adds a helper function to read only a single GPIO which uses 3-state logic. Examples of this typically include board straps which are used to provide mainboard-specific information at the hardware- level, such as board revision or configuration options. This is part of a larger clean-up effort for Snow. We may want to genericise this for other CPUs in the future. Change-Id: Ic44f5e589cda89b419a07eca246847e9ce7dcd8d Signed-off-by: David Hendricks <dhendrix@chromium.org> Reviewed-on: http://review.coreboot.org/2266 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-01-05	ARMv7: drop __ASSEMBLY__	Stefan Reinauer
	We moved to using __ASSEMBLER__ years ago since it is set by as. Change-Id: I60103ba23ebe87be1d0bc63beed0ef5b05eed4f2 Signed-off-by: Stefan Reinauer <reinauer@google.com> Reviewed-on: http://review.coreboot.org/2111 Reviewed-by: Ronald G. Minnich <rminnich@gmail.com> Tested-by: build bot (Jenkins)
2013-01-03	Add (hacked-up) s3c24x0_i2c files	David Hendricks
	These are needed for communicating with the PMIC on Snow. We'll tidy them up as we go along... Change-Id: I197f59927eae0ad66191862d052de2a8873fb22f Signed-off-by: David Hendricks <dhendrix@chromium.org> Reviewed-on: http://review.coreboot.org/2078 Tested-by: build bot (Jenkins) Reviewed-by: Hung-Te Lin <hungte@chromium.org>
2012-12-08	WIP: Initial support for Samsung Exynos 5250 ARM CPU	Stefan Reinauer
	Samsung SoC files, including Exynos5 (a Cortex-A15 implementation). Since this is an SoC we'll forego the x86-style {north,south}bridge and cpu distinction. We may try to split some stuff out before the final version if prudent. Change-Id: Ie068e9dc3dd836c83d90e282b10d5202e7a4ba9b Signed-off-by: David Hendricks <dhendrix@chromium.org> Signed-off-by: Stefan Reinauer <reinauer@google.com> Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Reviewed-on: http://review.coreboot.org/2005 Tested-by: build bot (Jenkins)
2012-12-01	Add include files for samsung s5p-common	Ronald G. Minnich
	These are from u-boot but have been cleaned up somewhat to remove references to linux include files. Change-Id: I5fe3954a11d8c4aa792620ef5e1a5ee8932b8578 Signed-off-by: Hung-Ti Lin <hungte@chromium.org> Signed-off-by: David Hendricks <dhendrix@chromium.org> Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Reviewed-on: http://review.coreboot.org/1930 Tested-by: build bot (Jenkins)