coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2014-08-14	exynos5: Refactor crazy old U-Boot base address macros away	Julius Werner
2014-08-06	exynos5420: Fix mmc clock source.	Hung-Te Lin
2014-07-11	src: Make use of 'CEIL_DIV(a, b)' macro across tree	Edward O'Callaghan
2013-12-21	exynos5420: don't assume MPLL for i2c parent clock	David Hendricks
2013-12-21	exynos5420: re-factor clock_get_periph_rate()	David Hendricks
2013-12-21	exynos5420: add a peripheral clock select --> PLL decoder	David Hendricks
2013-12-21	exynos5420: add CPLL and DPLL to the known list of PLLs	David Hendricks
2013-12-21	exynos5420: Fix some clock settings	Gabe Black
2013-12-21	exynos5420: Fix the clock divisor mask	Gabe Black
2013-12-21	exynos5420: Get rid of the PWM code like on the 5250	Gabe Black
2013-12-12	exynos5420: Setup clocks for MMC bus controller.	Hung-Te Lin
2013-07-10	exynos5420: Fix the way the rate of the input clock for i2c buses is found.	Gabe Black
2013-07-10	exynox5420: Remove the 5250 clock registers and fix the SPI frequency.	Gabe Black
2013-07-10	exynos5420: add I2C8-10 to clock_get_periph_rate()	David Hendricks
2013-07-10	exynos5420: Implement support for the pinmux as functions.	Gabe Black
2013-07-10	exynos5420: Fix some problems with the clock management code.	Gabe Black
2013-07-10	exynos5420: Replace the 5250 clock logic with 5420.	Gabe Black
2013-07-10	pit: Create an exynos5420 directory which is nearly a copy of exynos5250.	Gabe Black