coreboot.git - my copy of coreboot

Age	Commit message (Collapse)	Author
2004-02-17	removed unused set_var_mtrr() (use intel_set_var_mtrr() instead).	Li-Ta Lo
	git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1377 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-23	fixes from SONE	Ronald G. Minnich
	git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1228 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-22	fixes for EPIA.	Ronald G. Minnich
	git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1227 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-20	early mtrr for the p6	Ronald G. Minnich
	git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1223 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-11	- O2, enums, and switch statements work in romcc	Eric Biederman
	- Support for compiling romcc on non x86 platforms - new romc options -msse and -mmmx for specifying extra registers to use - Bug fixes to device the device disable/enable framework and an amd8111 implementation - Move the link specification to the chip specification instead of the path - Allow specifying devices with internal bridges. - Initial via epia support - Opteron errata fixes git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1200 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-09-26	It builds!	Ronald G. Minnich
	git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1150 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-09-26	add cpufixup.o	Ronald G. Minnich
	git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1149 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-09-26	cpu fixup for p6	Ronald G. Minnich
	git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1148 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-08-04	Commits for the new config static device design, to allow more than one static	Ronald G. Minnich
	cpu of a certain type and to eliminate the cpu p5 cpu p6 cpu k7 nonsense in the old config files. Next step is to hook into Eric's pci device stuff. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1067 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-19	- Major cleanup of the bootpath	Eric Biederman
	- Changes to allow more code to be compiled both ways - Working SMP support git-svn-id: svn://svn.coreboot.org/coreboot/trunk@987 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-12	- Remove all of the annoying $Id strings	Eric Biederman
	git-svn-id: svn://svn.coreboot.org/coreboot/trunk@956 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-06-24	Fixes to various config files.	Ronald G. Minnich
	git-svn-id: svn://svn.coreboot.org/coreboot/trunk@908 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-06-17	added config and other test files.	Ronald G. Minnich
	git-svn-id: svn://svn.coreboot.org/coreboot/trunk@882 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-05-19	- Cleanups on the romcc side including a pci interface that uses	Eric Biederman
	fewer registers, and is easier to hardcode. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@838 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-04-22	- Initial checkin of the freebios2 tree	Eric Biederman
	git-svn-id: svn://svn.coreboot.org/coreboot/trunk@784 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1