Age | Commit message (Expand) | Author |
2017-03-16 | cpu/intel: Fix the remaining issues detected by checkpatch | Lee Leahy |
2017-03-16 | cpu/intel: Wrap lines at 80 columns | Lee Leahy |
2017-03-16 | cpu/intel: Fix brace issues detected by checkpatch.pl | Lee Leahy |
2017-03-16 | cpu/intel: Add int to unsigned | Lee Leahy |
2017-03-16 | cpu/intel: Fix the spacing issues | Lee Leahy |
2017-03-16 | cpu/intel: Indent with tabs | Lee Leahy |
2017-03-09 | cpu/intel/model_6{e,f}x: Unify init files | Paul Menzel |
2017-02-22 | src/cpu/intel: Add license headers to all files | Martin Roth |
2017-01-10 | cpu/intel/model_6fx: Add Conroe-L to cpu_device_id list | Arthur Heymans |
2016-12-27 | cpu/intel/common: Add/Use common function to set virtualization | Matt DeVillier |
2016-12-18 | intel cache-as-ram: Move DCACHE_RAM_BASE | Kyösti Mälkki |
2016-12-11 | intel i945 gm45 x4x post-car: Use postcar_frame for MTRR setup | Kyösti Mälkki |
2016-12-10 | cpu/intel/lga775: Do not select model_6ex CPU | Arthur Heymans |
2016-12-09 | intel/sandybridge: Use postcar_frame for MTRR setup | Kyösti Mälkki |
2016-12-06 | CPU: Declare cpu_phys_address_size() for all arch | Kyösti Mälkki |
2016-12-01 | romstage_handoff: remove code duplication | Aaron Durbin |
2016-11-20 | intel sandy/ivy: Increase XIP cache with USE_NATIVE_RAMINIT | Kyösti Mälkki |
2016-11-20 | intel car: Move pre-ram stack guard lower | Kyösti Mälkki |
2016-11-18 | intel/sandybridge post-car: Redo MTRR settings and stack selection | Kyösti Mälkki |
2016-11-18 | intel post-car: Increase stacktop alignment | Kyösti Mälkki |
2016-11-11 | intel cache-as-ram: Unify stack setup | Kyösti Mälkki |
2016-11-11 | intel post-car: Separate files for setup_stack_and_mtrrs() | Kyösti Mälkki |
2016-11-11 | intel/sandybridge: Use common ACPI S3 recovery | Kyösti Mälkki |
2016-11-09 | Move select UDELAY_LAPIC from nb/gm45/Kconfig to cpu/model_1067x/Kconfig | Arthur Heymans |
2016-11-08 | cpu/intel/socket_mPGA478MN: Add socket P | Arthur Heymans |
2016-11-08 | intel post-car: Split legacy sockets | Kyösti Mälkki |
2016-10-31 | lib/prog_loaders: use common ramstage_cache_invalid() | Aaron Durbin |
2016-10-11 | cpu/intel/smm: Use CONFIG_SMM_TSEG_SIZE | Nico Huber |
2016-10-09 | cpu/intel/model_6ex: Set msr bits for dynamic L2, C2E, C4E | Arthur Heymans |
2016-09-08 | Kconfig: Add option for microcode filenames | Martin Roth |
2016-09-04 | src/cpu: Improve code formatting | Elyes HAOUAS |
2016-08-28 | src/cpu: Add required space before opening parenthesis '(' | Elyes HAOUAS |
2016-08-28 | src/cpu: Remove unnecessary whitespace before "\n" | Elyes HAOUAS |
2016-08-23 | src/cpu: Capitalize CPU, APIC and IOAPIC typo fix | Elyes HAOUAS |
2016-08-01 | Remove non-ascii & unprintable characters | Martin Roth |
2016-07-31 | src/cpu: Capitalize CPU | Elyes HAOUAS |
2016-07-31 | src/cpu: Capitalize ROM and RAM | Elyes HAOUAS |
2016-07-26 | intel car: Use MTRR WRPROT type for XIP cache | Kyösti Mälkki |
2016-07-26 | intel sandy/ivy: Redefine DCACHE_RAM_SIZE and DCACHE_RAM_MRC_VAR_SIZE | Kyösti Mälkki |
2016-07-23 | intel/haswell: Remove useless MTRR clear | Kyösti Mälkki |
2016-07-23 | intel/haswell post-car: Minor fix on MTRR setting | Kyösti Mälkki |
2016-07-23 | intel/haswell: Add asmlinkage for romstage_after_car() | Kyösti Mälkki |
2016-07-22 | intel car: Unify postcodes | Kyösti Mälkki |
2016-07-22 | intel car: Unify whitespace and comment fixes | Kyösti Mälkki |
2016-07-22 | intel car: Remove guard on XIP_ROM_SIZE | Kyösti Mälkki |
2016-07-22 | intel model_106cx: Include CAR from socket directory | Kyösti Mälkki |
2016-07-10 | intel post-car: Consolidate choose_top_of_stack() | Kyösti Mälkki |
2016-06-29 | intel/haswell: No need for ACPI S3 resume backup | Kyösti Mälkki |
2016-06-29 | intel romstage: Use run_ramstage() | Kyösti Mälkki |
2016-06-22 | ACPI S3: Add common recovery code | Kyösti Mälkki |
2016-06-22 | Ignore RAMTOP for MTRRs | Kyösti Mälkki |
2016-06-22 | intel/model_206ax: Prepare for dynamic CONFIG_RAMTOP | Kyösti Mälkki |
2016-06-22 | intel/model_2065x: Prepare for dynamic CONFIG_RAMTOP | Kyösti Mälkki |
2016-06-22 | intel cache-as-ram: Fix comment about MTRRs | Kyösti Mälkki |
2016-06-21 | intel/model_6ex: Prepare for dynamic CONFIG_RAMTOP | Kyösti Mälkki |
2016-06-21 | intel/car/cache_as_ram_ht.inc: Prepare for dynamic CONFIG_RAMTOP | Kyösti Mälkki |
2016-06-21 | intel/car/cache_as_ram.inc: Prepare for dynamic CONFIG_RAMTOP | Kyösti Mälkki |
2016-06-18 | intel: Fix romstage main() with asmlinkage | Kyösti Mälkki |
2016-06-18 | intel/cache_as_ram_ht.inc: Fix include | Kyösti Mälkki |
2016-06-18 | intel cache_as_ram: Fix typo in comment | Kyösti Mälkki |
2016-06-17 | intel/model_206ax: Move platform specific defines | Kyösti Mälkki |
2016-06-17 | Move definitions of HIGH_MEMORY_SAVE | Kyösti Mälkki |
2016-06-17 | Fix some cbmem.h includes | Kyösti Mälkki |
2016-05-06 | {cpu,soc}/intel: remove unused smm_init() function | Aaron Durbin |
2016-05-06 | cpu/intel/haswell: convert to using common MP and SMM init | Aaron Durbin |
2016-05-04 | cpu/x86: remove BACKUP_DEFAULT_SMM_REGION option | Aaron Durbin |
2016-05-02 | cpu/x86/mp_init: remove unused callback arguments | Aaron Durbin |
2016-03-10 | northbridge/intel/i440bx: Unify UDELAY selection | Stefan Reinauer |
2016-03-08 | x86 chipsets: utilize x86_setup_mtrrs_with_detect() | Aaron Durbin |
2016-02-26 | tree wide: Convert "if (CONFIG_.*_TPM.*)" to "if (IS_ENABLED(...))" | Denis 'GNUtoo' Carikli |
2016-02-14 | CPU/intel: Add missing license headers | Damien Roth |
2016-02-12 | Make MRC vs native a config rather than making a separate chipset for it. | Vladimir Serbinenko |
2016-02-10 | cpu/intel/microcode: allow microcode to be loaded in romstage | Aaron Durbin |
2015-12-06 | Remove #ifdef checks on Kconfig symbols | Martin Roth |
2015-12-06 | fsp_model_406dx: use external microcode .h files for rangeley | Martin Roth |
2015-12-02 | x86/smm: Initialize SMM on some CPUs one-by-one | Damien Zammit |
2015-11-24 | cpu/intel/socket_FCBGA559: Add new socket for Atom D5xx | Damien Zammit |
2015-11-20 | fsp1_0: Remove hardcoded microcode locations | Martin Roth |
2015-11-16 | intel/fsp_model_406dx: Load APs microcode in model_406dx_init | David Guckian |
2015-11-16 | intel/fsp_rangeley: Load BSP microcode in bootblock | David Guckian |
2015-11-10 | cpu/intel: Add socket BGA1284 | Marc Jones |
2015-10-31 | tree: drop last paragraph of GPL copyright header | Patrick Georgi |
2015-10-31 | sandybridge: Disable parallel CPU initialization | Nico Huber |
2015-10-28 | cpu/intel/fsp_model_206ax: Load microcode in coreboot | Martin Roth |
2015-10-23 | cpu/intel: Move Power notification ASL code into `common/acpi` | Paul Menzel |
2015-10-22 | Revert "Remove sandybridge and ivybridge FSP code path" | Martin Roth |
2015-10-15 | cpu/mtrr.h: Fix macro names for MTRR registers | Alexandru Gagniuc |
2015-10-14 | Revert "Remove FSP Rangeley SOC and mohonpeak board support" | Martin Roth |
2015-10-08 | arch/x86/bootblock: Do not include non-code files in bootblock.S | Alexandru Gagniuc |
2015-10-07 | x86/bootblock: Use LDFLAGS_bootblock to enable garbage collection | Alexandru Gagniuc |
2015-10-03 | Remove FSP Rangeley SOC and mohonpeak board support | Alexandru Gagniuc |
2015-10-03 | Remove sandybridge and ivybridge FSP code path | Alexandru Gagniuc |
2015-10-03 | sandybridge ivybridge: Treat native init as first class citizen | Alexandru Gagniuc |
2015-09-30 | cpu: microcode: Use microcode stored in binary format | Alexandru Gagniuc |
2015-09-24 | coreboot: move TS_END_ROMSTAGE to one spot | Aaron Durbin |
2015-09-09 | intel/model_2065x/Kconfig: Don't use LAPIC_MONOTONIC_TIMER | Martin Roth |
2015-09-04 | x86: remove cpu_incs as romstage Make variable | Aaron Durbin |
2015-08-25 | Intel: Remove CACHE_MRC_BIN - 'selected' everywhere in Kconfig | Martin Roth |
2015-07-29 | Add SoC specific microcode update check in ramstage | Rizwan Qureshi |
2015-07-07 | x86: Drop -Wa,--divide | Stefan Reinauer |