| Age | Commit message (Expand) | Author |
|---|
| 2018-06-17 | nb/intel/i440bx: Switch to POSTCAR_STAGE | Kyösti Mälkki |
| 2018-06-17 | cpu/intel/car/p3: Use variable MTRR count | Kyösti Mälkki |
| 2018-06-17 | cpu/intel/slot_1: Switch to different CAR setup | Kyösti Mälkki |
| 2018-06-17 | cpu/intel/car: Remove obsolete files | Kyösti Mälkki |
| 2018-06-14 | cpu/intel/haswell: Use the common intel romstage_main function | Arthur Heymans |
| 2018-06-06 | arch/x86: Make RELOCATABLE_RAMSTAGE the default | Kyösti Mälkki |
| 2018-06-06 | cpu/intel/model_{6xx,f2x,f3x,f4x}: Remove unneeded include | Elyes HAOUAS |
| 2018-06-05 | cpu/intel/haswell: Switch to POSTCAR_STAGE | Arthur Heymans |
| 2018-06-05 | cpu/intel/model_2065x: Switch to POSTCAR_STAGE | Arthur Heymans |
| 2018-06-05 | cpu/intel/model_206ax: Switch to POSTCAR_STAGE | Arthur Heymans |
| 2018-06-05 | cpu/intel/car/non-evict: Improve a few things | Arthur Heymans |
| 2018-06-05 | cpu/intel/car/non-evict: Prepare for some POSTCAR_STAGE support | Arthur Heymans |
| 2018-06-05 | nb/intel/gm45: Switch to POSTCAR_STAGE | Arthur Heymans |
| 2018-06-05 | nb/intel/x4x: Switch to POSTCAR_STAGE | Arthur Heymans |
| 2018-06-05 | nb/intel/pineview: Switch to POSTCAR_STAGE | Arthur Heymans |
| 2018-06-05 | nb/intel/i945: Switch to POSTCAR_STAGE | Arthur Heymans |
| 2018-06-05 | cpu/intel/car/core2: Improve a few things | Arthur Heymans |
| 2018-06-05 | cpu/intel/car/core2: Prepare for POSTCAR_STAGE support | Arthur Heymans |
| 2018-06-04 | security/tpm: Unify the coreboot TPM software stack | Philipp Deppenwiese |
| 2018-06-02 | intel/socket_mPGA604 intel/e7505: Switch to POSTCAR_STAGE | Kyösti Mälkki |
| 2018-06-02 | cpu/intel/car: Prepare for some POSTCAR_STAGE support | Kyösti Mälkki |
| 2018-06-02 | aopen/dxplplusu intel/e7505: Move to EARLY_CBMEM_INIT | Kyösti Mälkki |
| 2018-06-01 | src/cpu: Remove unneeded includes | Elyes HAOUAS |
| 2018-05-31 | {cpu,drivers,nb,soc}/intel: Use CACHE_ROM_BASE where appropriate | Nico Huber |
| 2018-05-24 | Remove leftover Intel CPU support | Kyösti Mälkki |
| 2018-05-01 | Fix freeze during chipset lockdown on Nehalem | Matthias Gazzari |
| 2018-04-30 | cpu/intel: Get rid of device_t | Elyes HAOUAS |
| 2018-04-24 | compiler.h: add __weak macro | Aaron Durbin |
| 2018-04-20 | pci: Move inline PCI functions to pci_ops.h | Patrick Rudolph |
| 2018-04-11 | Revert "model_206ax: Use parallel MP init" | Arthur Heymans |
| 2018-04-11 | model_206ax: Use parallel MP init | Arthur Heymans |
| 2018-04-10 | cpu/intel/sandybridge: Put stage cache into TSEG | Arthur Heymans |
| 2018-04-09 | intel/nehalem post-car: Use postcar_frame for MTRR setup | Kyösti Mälkki |
| 2018-02-27 | sb/intel/{bd82x6,ibexpeak}: Move RCBA macros to a common location | Arthur Heymans |
| 2018-02-06 | cpu/intel/haswell: Don't select PARALLEL_CPU_INIT | Arthur Heymans |
| 2018-01-18 | cpu/intel: Remove unused CPU code | Arthur Heymans |
| 2018-01-18 | security/tpm: Change TPM naming for different layers. | Philipp Deppenwiese |
| 2018-01-18 | security/tpm: Move tpm TSS and TSPI layer to security section | Philipp Deppenwiese |
| 2018-01-17 | cpu/intel/speedstep: Fix the PNOT ACPI method | Arthur Heymans |
| 2018-01-15 | Intel i82830 boards & chips: Remove - using LATE_CBMEM_INIT | Martin Roth |
| 2018-01-15 | Intel i3100 boards & chips: Remove - using LATE_CBMEM_INIT | Martin Roth |
| 2018-01-15 | Intel i5000 board & chips: Remove - using LATE_CBMEM_INIT | Martin Roth |
| 2017-11-30 | intel: Replace msr(0x198) with msr(IA32_PERF_STATUS) | Elyes HAOUAS |
| 2017-11-23 | Constify struct cpu_device_id instances | Jonathan Neuschäfer |
| 2017-11-07 | cpu/intel: Add Intel FCBGA1023 socket support | Hal Martin |
| 2017-11-04 | cpu/intel/speedstep: Emit PPKG object for first package | Nico Huber |
| 2017-10-29 | cpu/intel/model_1067x: Select UDELAY_LAPIC | Arthur Heymans |
| 2017-10-04 | chromeec: Remove checks for EC in RO | Daisuke Nojiri |
| 2017-09-12 | cpu/intel/slot_1: Increase CAR size to 8KiB | Keith Hui |
| 2017-09-12 | cpu/intel/car/cache_as_ram.inc: Fix long standing issues | Keith Hui |
| 2017-09-12 | cpu/intel/car/cache_as_ram.inc: Remove unused code | Keith Hui |
| 2017-09-12 | cpu/intel/car/cache_as_ram.inc: Remove broken HT code | Keith Hui |
| 2017-09-11 | cpu/x86/mp_init: remove adjust_cpu_apic_entry() | Aaron Durbin |
| 2017-09-08 | intel/car: Fix stack guard placement | Kyösti Mälkki |
| 2017-08-19 | intel/smm/gen1: Backup default SMM area | Kyösti Mälkki |
| 2017-08-19 | arch/x86: Clean up CONFIG_SMP and MAX_CPUS test | Kyösti Mälkki |
| 2017-07-13 | Rename __attribute__((packed)) --> __packed | Stefan Reinauer |
| 2017-07-06 | cpu/intel/haswell: Fix undefined behavior | Ryan Salsamendi |
| 2017-06-28 | cpu/intel: add IS_ENABLED() around Kconfig symbol references | Martin Roth |
| 2017-06-28 | cpu/intel/pineview: Include speedstep | Arthur Heymans |
| 2017-06-28 | cpu/*: Add whitespace around '<<' | Elyes HAOUAS |
| 2017-06-16 | haswell: add CBMEM_MEMINFO table when initing RAM | Matt DeVillier |
| 2017-06-09 | cpu/intel/model_206ax: Use tsc monotonic timer | Patrick Rudolph |
| 2017-06-07 | Use more secure HTTPS URLs for coreboot sites | Paul Menzel |
| 2017-05-16 | cpu/intel/turbo: Add option to disable turbo | Subrata Banik |
| 2017-03-16 | cpu/intel: Fix the remaining issues detected by checkpatch | Lee Leahy |
| 2017-03-16 | cpu/intel: Wrap lines at 80 columns | Lee Leahy |
| 2017-03-16 | cpu/intel: Fix brace issues detected by checkpatch.pl | Lee Leahy |
| 2017-03-16 | cpu/intel: Add int to unsigned | Lee Leahy |
| 2017-03-16 | cpu/intel: Fix the spacing issues | Lee Leahy |
| 2017-03-16 | cpu/intel: Indent with tabs | Lee Leahy |
| 2017-03-09 | cpu/intel/model_6{e,f}x: Unify init files | Paul Menzel |
| 2017-02-22 | src/cpu/intel: Add license headers to all files | Martin Roth |
| 2017-01-10 | cpu/intel/model_6fx: Add Conroe-L to cpu_device_id list | Arthur Heymans |
| 2016-12-27 | cpu/intel/common: Add/Use common function to set virtualization | Matt DeVillier |
| 2016-12-18 | intel cache-as-ram: Move DCACHE_RAM_BASE | Kyösti Mälkki |
| 2016-12-11 | intel i945 gm45 x4x post-car: Use postcar_frame for MTRR setup | Kyösti Mälkki |
| 2016-12-10 | cpu/intel/lga775: Do not select model_6ex CPU | Arthur Heymans |
| 2016-12-09 | intel/sandybridge: Use postcar_frame for MTRR setup | Kyösti Mälkki |
| 2016-12-06 | CPU: Declare cpu_phys_address_size() for all arch | Kyösti Mälkki |
| 2016-12-01 | romstage_handoff: remove code duplication | Aaron Durbin |
| 2016-11-20 | intel sandy/ivy: Increase XIP cache with USE_NATIVE_RAMINIT | Kyösti Mälkki |
| 2016-11-20 | intel car: Move pre-ram stack guard lower | Kyösti Mälkki |
| 2016-11-18 | intel/sandybridge post-car: Redo MTRR settings and stack selection | Kyösti Mälkki |
| 2016-11-18 | intel post-car: Increase stacktop alignment | Kyösti Mälkki |
| 2016-11-11 | intel cache-as-ram: Unify stack setup | Kyösti Mälkki |
| 2016-11-11 | intel post-car: Separate files for setup_stack_and_mtrrs() | Kyösti Mälkki |
| 2016-11-11 | intel/sandybridge: Use common ACPI S3 recovery | Kyösti Mälkki |
| 2016-11-09 | Move select UDELAY_LAPIC from nb/gm45/Kconfig to cpu/model_1067x/Kconfig | Arthur Heymans |
| 2016-11-08 | cpu/intel/socket_mPGA478MN: Add socket P | Arthur Heymans |
| 2016-11-08 | intel post-car: Split legacy sockets | Kyösti Mälkki |
| 2016-10-31 | lib/prog_loaders: use common ramstage_cache_invalid() | Aaron Durbin |
| 2016-10-11 | cpu/intel/smm: Use CONFIG_SMM_TSEG_SIZE | Nico Huber |
| 2016-10-09 | cpu/intel/model_6ex: Set msr bits for dynamic L2, C2E, C4E | Arthur Heymans |
| 2016-09-08 | Kconfig: Add option for microcode filenames | Martin Roth |
| 2016-09-04 | src/cpu: Improve code formatting | Elyes HAOUAS |
| 2016-08-28 | src/cpu: Add required space before opening parenthesis '(' | Elyes HAOUAS |
| 2016-08-28 | src/cpu: Remove unnecessary whitespace before "\n" | Elyes HAOUAS |
| 2016-08-23 | src/cpu: Capitalize CPU, APIC and IOAPIC typo fix | Elyes HAOUAS |
| 2016-08-01 | Remove non-ascii & unprintable characters | Martin Roth |
