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path: root/src/cpu/intel
AgeCommit message (Expand)Author
2021-01-21cpu/intel/socket_LGA775: Increase DCACHE_RAM_SIZEElyes HAOUAS
2021-01-18cpu/intel/smm/gen1/smmrelocate.c: Remove repeated wordElyes HAOUAS
2021-01-15build system: Always add coreboot.pre dependency to intermediatesPatrick Georgi
2021-01-15cpu/intel/haswell/acpi.c: Use C-state enum definitionsAngel Pons
2021-01-15cpu/intel/haswell: Factor out ACPI C-state valuesAngel Pons
2021-01-15cpu/intel/*init: Remove obsolete cache enablePatrick Rudolph
2021-01-15cpu/x86/mpinit: Serialize microcode updates for HT threadsPatrick Rudolph
2021-01-14build system: Structure and serialize INTERMEDIATEPatrick Georgi
2021-01-11cpu/intel/haswell: Add delay for TPM before Flex Ratio rebootAngel Pons
2021-01-11cpu/intel/haswell: Allow tuning VR for C-state operationsAngel Pons
2021-01-11cpu/intel/haswell: Raise PSI1 threshold to 20AAngel Pons
2021-01-11cpu/intel/haswell: Enable turbo ratio if availableAngel Pons
2021-01-11cpu/intel/haswell: Do not set PMG_IO_CAPTURE_BASE MSRAngel Pons
2021-01-10cpu/intel/haswell/haswell.h: Align with BroadwellAngel Pons
2021-01-10cpu/intel/haswell: Align cosmetics with BroadwellAngel Pons
2021-01-10cpu/intel/haswell: Do not determine CPU type at runtimeAngel Pons
2021-01-08cpu/intel/model_206ax: Always return a package from _CSTAngel Pons
2021-01-08*/Makefile.inc: Add some INTERMEDIATE targets to .PHONYArthur Heymans
2021-01-07arch/x86: Move prologue to .init sectionKyösti Mälkki
2021-01-07cpu/intel/haswell: Rename `HASWELL_BCLK` to `CPU_BCLK`Angel Pons
2021-01-06cpu/intel/model_206ax: Simplify C-state acpigenAngel Pons
2021-01-06cpu/intel/model_206ax: Rename `cX_acpower` optionsAngel Pons
2021-01-06cpu/intel/model_206ax: Unify ACPI C-state optionsAngel Pons
2021-01-06cpu/intel/x/chip.h: Drop unused `disable_acpi` settingAngel Pons
2020-12-25cpu/intel/model_206ax: Add more CPU steppingsAngel Pons
2020-12-25nb/intel/sandybridge: Move steppings to CPU headerAngel Pons
2020-12-14arch/x86: Combine bootblock linker scriptsKyösti Mälkki
2020-12-12nb/intel/sandybridge: Clean up stepping logicAngel Pons
2020-12-11Drop many cases of .previous directive useKyösti Mälkki
2020-12-02cbfs: Simplify load/map API names, remove type argumentsJulius Werner
2020-12-01cpu/intel/microcode: Mark assemblycode as 32bitPatrick Rudolph
2020-11-27Makefile.inc: Move adding mcu FIT entriesArthur Heymans
2020-11-22cpu/intel/common: Fill cpu voltage in SMBIOS tablesPatrick Rudolph
2020-11-21intel/socket_441: Increase bootblock sizeJulius Werner
2020-11-10cpu/x86/mtrr.h: Rename CORE2 alternative SMRR registersArthur Heymans
2020-11-10sec/intel/cbnt: Stitch in ACMs in the coreboot imageArthur Heymans
2020-11-09cpu/intel/model_206ax: Get CPU frequencies for SMBIOS type 4Michał Żygowski
2020-11-03cpu/intel/haswell: Move smmrelocate.c MSR definitions to headerAngel Pons
2020-11-02cpu/intel/car/non-evict/cache_as_ram.S: Add support for longmodePatrick Rudolph
2020-10-31{cpu,nb}/intel/haswell: Drop unnecessary `UL` suffixAngel Pons
2020-10-31cpu/intel/common: correct MSR for the Nominal Performance in CPPCMichael Niewöhner
2020-10-30cpu/intel/Makefile.inc: Use correct Kconfig symbolsAngel Pons
2020-10-26cpu/intel/common: implement the two missing CPPC v2 autonomous registersMichael Niewöhner
2020-10-24cpu/intel/common: rework code previously moved to common cpu codeMichael Niewöhner
2020-10-24{cpu,soc}/intel: deduplicate cpu codeMichael Niewöhner
2020-10-23haswell/broadwell: Fix typos of `BCLK`Angel Pons
2020-10-21cpu/intel/common: Fix regressionPatrick Rudolph
2020-10-21{cpu,soc}/intel: replace AES-NI locking by common implemenation callMichael Niewöhner
2020-10-20cpu/intel/model_{2065x,206ax}: fix AES-NI lockingMichael Niewöhner
2020-10-19cpu/intel/common: add a Kconfig to control AES-NI lockingMichael Niewöhner
2020-10-19cpu/intel/common: only lock AES-NI when supportedMichael Niewöhner
2020-10-19cpu/intel/common: rework AES-NI lockingMichael Niewöhner
2020-10-19soc/intel/skl,cpu/intel: copy AES-NI locking to common cpu codeMichael Niewöhner
2020-10-17cpu/intel,soc/intel: drop Kconfig for hyperthreadingMichael Niewöhner
2020-10-16include/cpu/x86: introduce new helper for (un)setting MSRsMichael Niewöhner
2020-10-14haswell/lynxpoint: Align cosmetics with BroadwellAngel Pons
2020-10-02drivers/spi: Add BOOT_DEVICE_SPI_FLASH_NO_EARLY_WRITES configShelley Chen
2020-09-28cpu/intel/206ax/acpi.c: Fix get_cores_per_packageEvgeny Zinoviev
2020-09-27cpu/intel/haswell/smmrelocate.c: Spell `CPU` in uppercaseAngel Pons
2020-09-27cpu/intel/haswell/haswell_init.c: Align printk's with BroadwellAngel Pons
2020-09-26arch/x86: Introduce `ARCH_ALL_STAGES_X86_32`Angel Pons
2020-09-21src/cpu: Drop unneeded empty linesElyes HAOUAS
2020-09-12cpu/intel/model_1067x: enable PECIMichael Büchler
2020-08-30cpu/intel/haswell: Set LT_LOCK_MEMORY MSR on finalize stepAngel Pons
2020-08-21cpu/intel/haswell: Select HAVE_ASAN_IN_ROMSTAGEHarshit Sharma
2020-08-18cpu/intel/common: Use macro for access_sizeElyes HAOUAS
2020-08-17cpu/intel/model_6fx: Include Conroe-L microcodeArthur Heymans
2020-08-11cpu/intel: Remove Core 2 Duo E8200 CPUID from model_6fxAngel Pons
2020-08-06cpu/intel/common: Add `intel_ht_supported` functionAngel Pons
2020-08-03cpu/intel/haswell: add Crystal Well CPU IDsIru Cai
2020-08-03cpu/intel/common/fsb.c: add Crystal Well supportIru Cai
2020-07-26cpu/intel/car/romstage.c: Remove unused <bootblock_common.h>Elyes HAOUAS
2020-07-26src: Change BOOL CONFIG_ to CONFIG() in comments & stringsMartin Roth
2020-07-26cpu,soc/intel: Drop select SMPKyösti Mälkki
2020-07-26cpu/intel/model_206ax: Clean up includesElyes HAOUAS
2020-07-26src: Remove unused 'include <cpu/intel/common/common.h>Elyes HAOUAS
2020-07-14cpu/intel/model_1067x: Drop <cpu/x86/mp.h> includeElyes HAOUAS
2020-07-14src: Remove unused 'include <cpu/x86/msr.h>'Elyes HAOUAS
2020-07-14src: Remove unused 'include <types.h>'Elyes HAOUAS
2020-07-10cpu/intel/haswell/finalize.c: Drop dead codeAngel Pons
2020-07-09cpu/intel/model_2065x/model_2065x_init.c: Drop dead codeAngel Pons
2020-07-09cpu/intel/model_206ax/finalize.c: Drop dead codeAngel Pons
2020-07-08haswell: relocate `romstage_common` to northbridgeAngel Pons
2020-07-08nb/intel/haswell: Drop unnecessary variableAngel Pons
2020-07-08haswell: drop unused function parameterAngel Pons
2020-06-22cpu/x86/lapic: Support x86_64 and clean up codePatrick Rudolph
2020-06-16sb,soc/intel: Replace smm_southbridge_enable_smi()Kyösti Mälkki
2020-06-15gm45 boards: Factor out MAX_CPUSAngel Pons
2020-06-15pineview boards: Factor out MAX_CPUSAngel Pons
2020-06-15haswell boards: Factor out MAX_CPUSAngel Pons
2020-06-15arrandale boards: Factor out MAX_CPUSAngel Pons
2020-06-15sandybridge boards: Factor out MAX_CPUSAngel Pons
2020-06-15cpu/intel: Remove obsolete comment in CAR setupKyösti Mälkki
2020-06-15arch/x86: Remove NO_FIXED_XIP_ROM_SIZEKyösti Mälkki
2020-06-13cpu/intel/car: Use symbols for CAR MTRR setupKyösti Mälkki
2020-06-06src: Remove unused 'include <cpu/x86/mtrr.h>'Elyes HAOUAS
2020-06-06cpu/intel/haswell: Remove unused 'include <cpu/x86/bist.h>'Elyes HAOUAS
2020-06-06src: Remove unused '#include <cpu/x86/smm.h>'Elyes HAOUAS
2020-06-04cpu/intel/slot_1: Select 16KiB bootblock if console is enabledKeith Hui
2020-06-02src: Remove unused '#include <cpu/x86/lapic.h>'Elyes HAOUAS
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