summaryrefslogtreecommitdiff
path: root/src/cpu/intel
AgeCommit message (Expand)Author
2014-01-16cpu/intel: Remove dummy terminators from microcode blobsAlexandru Gagniuc
2014-01-16cpu/intel: Make all Intel CPUs load microcode from CBFSAlexandru Gagniuc
2014-01-15nehalem/sandy/ivy/haswell: Enable WRPROT cache for all of flashKyösti Mälkki
2014-01-15Re-declare CACHE_ROM_SIZE as aligned ROM_SIZE for MTRRKyösti Mälkki
2014-01-11intel/fsp: Fix microcode includingPatrick Georgi
2013-12-21haswell: Update microcode revisionDuncan Laurie
2013-12-17cpu/intel: Do not rely on CBFS microcode having a terminatorAlexandru Gagniuc
2013-12-13cpu: Rename CPU_MICROCODE_IN_CBFS to SUPPORT_CPU_UCODE_IN_CBFSAlexandru Gagniuc
2013-12-12haswell: Export functions for CPU family+model and steppingDuncan Laurie
2013-12-12haswell: Update ULT microcode to rev 14hDuncan Laurie
2013-12-07haswell: VR controller configurationAaron Durbin
2013-12-07haswell: Misc power management setup and fixesDuncan Laurie
2013-12-05cpu: Remove BOARD_MICROCODE_CBFS_GENERATE Kconfig optionAlexandru Gagniuc
2013-12-04Add the Intel FSP 206ax CPU core supportMarc Jones
2013-12-01slippy/falco/peppy: Fix SPD GPIO initialization.Aaron Durbin
2013-11-25haswell: check for clean resetAaron Durbin
2013-11-24haswell: Update ULT microcode to 0x10Duncan Laurie
2013-11-24haswell: Remove limit on package C-stateDuncan Laurie
2013-11-24haswell: split microcode between ULT and non-ULTAaron Durbin
2013-11-24haswell: Update ULT microcode to rev 'a'Duncan Laurie
2013-11-24haswell: Configure PCH power sharing for ULTDuncan Laurie
2013-11-24haswell: calibrate 24MHz clock against BCLKAaron Durbin
2013-11-24haswell: configure c-statesAaron Durbin
2013-11-24haswell: Put each logical processor in its own P-state domainDuncan Laurie
2013-11-24haswell: Update microcode for ULT/40651 to rev 8Duncan Laurie
2013-11-23Rename SANDYBRIDGE_BCLK to NEHALEM_BCLK in 2065x.Vladimir Serbinenko
2013-11-23Remove MRC variables from 2065x CAR init.Vladimir Serbinenko
2013-11-21Fix error message on wrong compiles of 2065xVladimir Serbinenko
2013-11-13intel/2065x: Use TSC for udelay()Vladimir Serbinenko
2013-09-21CBMEM: Always select CAR_MIGRATIONKyösti Mälkki
2013-09-21timestamps: Stash early timestamps in CAR_GLOBALKyösti Mälkki
2013-09-21timestamps intel: Move timestamp scratchpad to chipsetKyösti Mälkki
2013-07-30cpu/intel/model_67x: Add missing includeKyösti Mälkki
2013-07-11cpu: Fix spellingMartin Roth
2013-07-11usbdebug: Drop old includesKyösti Mälkki
2013-07-10usbdebug: Put ehci_debug_info in CAR_GLOBALKyösti Mälkki
2013-07-10ec: Add romstage function for checking and rebooting ECDuncan Laurie
2013-06-14usbdebug: Drop temporary disables of log outputKyösti Mälkki
2013-06-13Add support for Intel Nehalem CPUVladimir Serbinenko
2013-06-03haswell: allow for disabled hyperthreadingAaron Durbin
2013-05-24cpu/intel/haswell/Kconfig: Intend help text with two spacesPaul Menzel
2013-05-16haswell: enable cache-as-ram migrationAaron Durbin
2013-05-14x86: add thread supportAaron Durbin
2013-05-10Drop prototype guarding for romccStefan Reinauer
2013-05-08copy_and_run: drop boot_complete parameterStefan Reinauer
2013-05-07haswell: use asmlinkage for assembly-called funcsAaron Durbin
2013-05-07haswell: use tsc for udelay()Aaron Durbin
2013-05-01haswell: 24MHz monotonic time implementationAaron Durbin
2013-04-23Intel microcode: Return when `microcode_updates` is `NULL`Vladimir Serbinenko
2013-04-03haswell: enable ROM cachingAaron Durbin
2013-04-03haswell: keep ROM cache enabledAaron Durbin
2013-04-03haswell: use new interface to disable rom cachingAaron Durbin
2013-04-01lynxpoint: split clearing and enabling of smmAaron Durbin
2013-03-22haswell: Add microcode for ULT C0 stepping 0x40651Duncan Laurie
2013-03-22haswell: vboot path support in romstageAaron Durbin
2013-03-22haswell: use dynamic cbmemAaron Durbin
2013-03-22x86: Unify arch/io.h and arch/romcc_io.hStefan Reinauer
2013-03-21Intel: Update CPU microcode for 6fx CPUsStefan Reinauer
2013-03-21Intel: Update CPU microcode for 106cx CPUsStefan Reinauer
2013-03-21Intel: Update CPU microcode scriptStefan Reinauer
2013-03-21lynxpoint: Add helper functions for reading PM and GPIO baseDuncan Laurie
2013-03-21haswell: RESET_ON_INVALID_RAMSTAGE_CACHE optionAaron Durbin
2013-03-21haswell: implement ramstage caching in SMM regionAaron Durbin
2013-03-21haswell: add multipurpose SMM memory regionAaron Durbin
2013-03-21haswell: set TSEG as WB cacheable in romstageAaron Durbin
2013-03-21haswell: support for parallel SMM relocationAaron Durbin
2013-03-21haswell: use s3_resume field in romstage_handoffAaron Durbin
2013-03-21x86: protect against abi assumptions from compilerAaron Durbin
2013-03-21haswell: support for CONFIG_RELOCATABLE_RAMSTAGEAaron Durbin
2013-03-21ramstage: prepare for relocationAaron Durbin
2013-03-20Intel: Update CPU microcode for Sandybridge/Ivybridge CPUsStefan Reinauer
2013-03-20Intel: Update CPU microcode for 1067x CPUsStefan Reinauer
2013-03-19haswell: wait 10ms after INIT IPIAaron Durbin
2013-03-19haswell: Parallel AP bringupAaron Durbin
2013-03-19intel microcode: split up microcode loading stagesAaron Durbin
2013-03-18haswell: add romstage_after_car() functionAaron Durbin
2013-03-18haswell: move call site of save_mrc_data()Aaron Durbin
2013-03-18haswell: romstage: pass stack pointer and MTRRsAaron Durbin
2013-03-18haswell: unify romstage logicAaron Durbin
2013-03-18haswell: adjust CAR usageAaron Durbin
2013-03-18haswell: enable caching before SMM initializationAaron Durbin
2013-03-18haswell: Clear correct number of MCA banksAaron Durbin
2013-03-18haswell: move definition of CORE_THREAD_COUNT_MSRAaron Durbin
2013-03-18haswell: Use SMM ModulesAaron Durbin
2013-03-17x86 intel: Add Firmware Interface Table supportAaron Durbin
2013-03-14haswell: Add ULT CPUID and updated microcodeDuncan Laurie
2013-03-14haswell: Properly Guard Engergy Policy by CPUIDAaron Durbin
2013-03-14haswell: Add initial support for Haswell platformsAaron Durbin
2013-03-07Fix socket LGA775Kyösti Mälkki
2013-03-01GPLv2 notice: Unify all files to just use one space in »MA 02110-1301«Paul Menzel
2013-02-14sconfig: rename lapic_cluster -> cpu_clusterStefan Reinauer
2013-02-11Intel: Replace MSR 0xcd with MSR_FSB_FREQPatrick Georgi
2013-02-09speedstep: Deduplicate some MSR identifiersPatrick Georgi
2013-02-09document Intel VMX locking behaviorMike Frysinger
2013-01-30Extend CBFS to support arbitrary ROM source media.Hung-Te Lin
2012-11-27Get rid of drivers classPatrick Georgi
2012-11-13Add spinlock to serialize Intel microcode updatesStefan Reinauer
2012-11-13Fix CONFIG_MAX_CPU set to 1 CPU build problemStefan Reinauer
2012-11-12ivybridge: Catch unknown CPU revisionsStefan Reinauer
2012-11-12Initialize the VMX MSRMarc Jones
generated by cgit v1.2.3 (git 2.25.1) at 2024-12-18 14:07:33 +0000