| Age | Commit message (Expand) | Author |
|---|
| 2012-11-27 | Get rid of drivers class | Patrick Georgi |
| 2012-11-13 | Add spinlock to serialize Intel microcode updates | Stefan Reinauer |
| 2012-11-13 | Fix CONFIG_MAX_CPU set to 1 CPU build problem | Stefan Reinauer |
| 2012-11-12 | ivybridge: Catch unknown CPU revisions | Stefan Reinauer |
| 2012-11-12 | Initialize the VMX MSR | Marc Jones |
| 2012-11-12 | Revert "Remove code that enables/disables VMX in coreboot on chromebooks." | Marc Jones |
| 2012-11-12 | sandybridge: Correct reporting of cores and threads | Stefan Reinauer |
| 2012-11-07 | Leave power control registers unlocked | Sameer Nanda |
| 2012-11-06 | cpu/intel/model_1067x: Add proper c-state/p-state/thermal support | Nico Huber |
| 2012-11-06 | intel/socket_BGA956: enable speedstep, CAR, MMX, SSE | Patrick Georgi |
| 2012-11-05 | Overhaul speedstep code | Nico Huber |
| 2012-11-05 | Fix some indentation flaws and break very long lines | Nico Huber |
| 2012-11-02 | Correct FSB reading in speedstep ACPI | Nico Huber |
| 2012-11-01 | Merge cpu/intel/acpi.h into cpu/intel/speedstep.h | Nico Huber |
| 2012-10-30 | Add support for socket LGA775 | Stefan Tauner |
| 2012-10-07 | Fix typo in mPGA603 socket | Kyösti Mälkki |
| 2012-10-07 | Remove chip.h files without config structure | Kyösti Mälkki |
| 2012-09-05 | buildsystem: Make CPU microcode updating more configurable | Alexandru Gagniuc |
| 2012-08-27 | Intel model_106cx: change CAR to HT-capable | Kyösti Mälkki |
| 2012-08-22 | Auto-declare chip_operations | Kyösti Mälkki |
| 2012-08-09 | Synchronize rdtsc instructions | Stefan Reinauer |
| 2012-08-03 | Intel CPUs: Fix counting of CPU cores | Kyösti Mälkki |
| 2012-07-31 | Revert "Use broadcast SIPI to startup siblings" | Sven Schnelle |
| 2012-07-31 | Revert "remove CONFIG_SERIAL_CPU_INIT" | Sven Schnelle |
| 2012-07-26 | CPU: Add option to set TCC activation offset | Duncan Laurie |
| 2012-07-26 | ACPI: Add a method to notify OS to re-read _PPC | Duncan Laurie |
| 2012-07-26 | ACPI: Add function to write _PPC using NVS | Duncan Laurie |
| 2012-07-26 | Drop CONFIG_CPU_MODEL_NAME and fix CPU name displayed in logs | Stefan Reinauer |
| 2012-07-26 | Enable Microcode in CBFS for all SandyBridge/IvyBridge systems | Stefan Reinauer |
| 2012-07-25 | Fix comment to reference IvyBridge, too | Stefan Reinauer |
| 2012-07-25 | Include SandyBridge Microcode when IvyBridge is enabled | Stefan Reinauer |
| 2012-07-25 | Fix date output in Microcode update | Stefan Reinauer |
| 2012-07-24 | CPU: Set flex ratio to nominal TDP ratio in bootblock | Duncan Laurie |
| 2012-07-24 | CPU: Update ivybridge PP1 current limit value | Duncan Laurie |
| 2012-07-24 | CPU: Add basic support for Nominal Configurable TDP | Duncan Laurie |
| 2012-07-24 | Config changes to support microcode in CBFS | Vadim Bendebury |
| 2012-07-24 | Add microcode blob processing | Vadim Bendebury |
| 2012-07-24 | Add code to read Intel microcode from CBFS | Vadim Bendebury |
| 2012-07-24 | Rename microcode include file to be model agnostic | Vadim Bendebury |
| 2012-07-24 | Properly identify ACPI C3 states in _CST table. | Duncan Laurie |
| 2012-07-24 | Remove code that enables/disables VMX in coreboot on chromebooks. | Ronald G. Minnich |
| 2012-07-04 | Intel cpus: Extend cache to cover complete Flash Device | Kyösti Mälkki |
| 2012-07-04 | Intel model_106cx: change CAR to model_6ex | Kyösti Mälkki |
| 2012-07-04 | Intel cpus: delete dead CAR code and whitespace fixes | Kyösti Mälkki |
| 2012-07-04 | Intel cpus: use CPU_ADDR_BITS from Kconfig during CAR | Kyösti Mälkki |
| 2012-07-02 | remove CONFIG_SERIAL_CPU_INIT | Sven Schnelle |
| 2012-07-02 | Use broadcast SIPI to startup siblings | Sven Schnelle |
| 2012-07-02 | Intel CPUs: execute microcode update only once per core | Kyösti Mälkki |
| 2012-06-19 | Enable Intel PECI on Model 6fx CPUs | Sven Schnelle |
| 2012-05-29 | Drop config variable CPU_MODEL_INDEX | Stefan Reinauer |
| 2012-05-08 | Clean up #ifs | Patrick Georgi |
| 2012-05-03 | Fix register corruption during Intel Microcode update | Stefan Reinauer |
| 2012-05-02 | Don't include console.h in microcode.c when compiling with ROMCC | Stefan Reinauer |
| 2012-04-30 | Fix up Sandybridge C state generation code | Stefan Reinauer |
| 2012-04-30 | Rework ACPI CST table generation | Stefan Reinauer |
| 2012-04-26 | microcode: print date of microcode and unify output | Stefan Reinauer |
| 2012-04-26 | Revamp Intel microcode update code | Stefan Reinauer |
| 2012-04-25 | Replace cache control magic numbers with symbols | Patrick Georgi |
| 2012-04-06 | Fix support for RAM-less multi-processor init | Kyösti Mälkki |
| 2012-04-05 | Add support for Intel Sandybridge CPU | Stefan Reinauer |
| 2012-04-03 | Add support for Intel Turbo Boost feature | Stefan Reinauer |
| 2012-04-02 | Apply cache-as-ram conditionally on socket mPGA604 | Kyösti Mälkki |
| 2012-03-31 | Whitespace fixes | Patrick Georgi |
| 2012-03-31 | Intel cpus: get MAXPHYADDR at runtime for new CAR | Kyösti Mälkki |
| 2012-03-31 | Intel cpus: add hyper-threading CPU support to new CAR | Kyösti Mälkki |
| 2012-03-31 | Intel cpus: improve CPU compatibility of new CAR | Kyösti Mälkki |
| 2012-03-31 | Intel cpus: apply some good programming practices in new CAR | Kyösti Mälkki |
| 2012-03-31 | Intel cpus: cache actual size of the Flash ROM device | Kyösti Mälkki |
| 2012-03-31 | Intel cpus: copy model_6ex CAR code | Kyösti Mälkki |
| 2012-03-25 | Intel cpus: Fix deadlock on hyper-threading init | Kyösti Mälkki |
| 2012-03-17 | Intel cpus: Include CAR from socket | Kyösti Mälkki |
| 2012-02-16 | Intel cpus: use CPU_PHYSMASK_HI define in CAR | Kyösti Mälkki |
| 2012-02-15 | Intel model_106cx: Use symbolic names for MTRR bits | Kyösti Mälkki |
| 2012-02-10 | Intel cpus: apply un-written naming rules | Kyösti Mälkki |
| 2012-02-09 | Add Intel Socket LGA771 | Sven Schnelle |
| 2012-01-10 | MTRR: get physical address size from CPUID | Sven Schnelle |
| 2012-01-09 | ACPI: mark empty get_cst_entries() weak | Sven Schnelle |
| 2011-11-01 | Remove XIP_ROM_BASE | Patrick Georgi |
| 2011-10-30 | Fix slow CAR execution introduced by 7c7d87182feb78cb2bc02fb3558bef56a41682c9 | Rudolf Marek |
| 2011-10-28 | Get rid of the old romstage-as-bootblock ROM layout | Patrick Georgi |
| 2011-10-28 | Get rid of AUTO_XIP_ROM_BASE | Patrick Georgi |
| 2011-10-25 | SPEEDSTEP: write _CST tables | Sven Schnelle |
| 2011-10-18 | Activate older Xeon P4 microcodes | Kyösti Mälkki |
| 2011-09-09 | Crank up CPU speed on Intel Core and Core2 CPUs | Patrick Georgi |
| 2011-08-04 | cpu/intel/slot_1: Init L2 cache on SECC(2) CPUs. | Keith Hui |
| 2011-05-03 | Enable caching for ROM area in model_6ex/cache_as_ram.inc | Sven Schnelle |
| 2011-04-21 | more ifdef -> if fixes | Stefan Reinauer |
| 2011-04-14 | Use symbolic names for some MTRR bits instead of numbers in CAR code | Stefan Reinauer |
| 2011-04-11 | Unify use of post_code | Alexandru Gagniuc |
| 2011-01-27 | oops. this is weird. CAR addresses should be specified in the socket and not in | Stefan Reinauer |
| 2011-01-19 | Revert r5902 to make code more readable again. At least three people like to | Stefan Reinauer |
| 2011-01-12 | drop unused files | Stefan Reinauer |
| 2010-12-12 | fix model 106cx | Stefan Reinauer |
| 2010-12-11 | factor out cpu power management base into a separate file. And fix a bug in | Stefan Reinauer |
| 2010-12-08 | These empty files sneaked in from another patch and shouldn't have been inclu... | Tobias Diedrich |
| 2010-12-08 | Tobias Diedrich wrote: | Tobias Diedrich |
| 2010-12-08 | Move "select CACHE_AS_RAM" lines from boards into CPU socket. | Uwe Hermann |
| 2010-11-17 | Move Intel power management related defines to some central location. | Patrick Georgi |
| 2010-10-18 | update intel microcode files. | Stefan Reinauer |
| 2010-10-18 | Make update-microcodes.sh executable. | Uwe Hermann |
