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path: root/src/cpu/intel
AgeCommit message (Expand)Author
2024-02-20treewide: Remove unused CHIPsArthur Heymans
2024-02-18arch to cpu: Add SPDX license headers to Kconfig filesMartin Roth
2024-02-08cpu/x86/64bit: Turn jumping to long mode into a macroArthur Heymans
2024-01-31device/device.h: Rename busses for clarityArthur Heymans
2024-01-31include/device/device.h: Remove CHIP_NAME() macroNicholas Sudsgaard
2024-01-24cpu: Rename Makefiles from .inc to .mkMartin Roth
2024-01-05northbridge/intel/sandybridge: Enable x86_64 for mrc.binPatrick Rudolph
2023-12-22Revert "cpu/intel/common: Define build time physical address reserved bits"Jeremy Compostella
2023-12-04cpu/intel/model_206ax: Use macro IS_IVY_CPUPatrick Rudolph
2023-11-20nb/intel/sandybridge: Use SA devid to identify PC typePatrick Rudolph
2023-11-20cpu/intel/model_206ax: Lock MSR_PP_CURRENT_CONFIGPatrick Rudolph
2023-11-20cpu/intel/model_206ax: Write MSRs in scope package only oncePatrick Rudolph
2023-11-14cpu/intel/model_2065x: Read CPU voltage for SMBIOSPatrick Rudolph
2023-10-20cpu/intel/common: Define build time physical address reserved bitsJeremy Compostella
2023-10-20x86: Add pre-memory stages CBFS cache scratchpad supportJeremy Compostella
2023-10-06cpu/intel/model_206ax: Only use supported C-statesPatrick Rudolph
2023-10-06cpu/intel/model_206ax: Use haswell cstate_mapPatrick Rudolph
2023-10-06cpu/intel/model_206ax: Print supported C-statesPatrick Rudolph
2023-10-05cpu/intel/socket_BGA956: Double DCACHE_RAM_SIZE to 64 kBArthur Heymans
2023-09-29arch/x86/Kconfig: introduce RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORTFelix Held
2023-09-29*/include/cpu: use unsigned int for number of address bitsFelix Held
2023-09-14x86: Add .data section support for pre-memory stagesJeremy Compostella
2023-09-12arch/x86: Reduce max phys address size for Intel TME capable SoCsJeremy Compostella
2023-09-12cpu/intel: Move is_tme_supported() from soc/intel to cpu/intelJeremy Compostella
2023-08-06cpu: Add SPDX license headers to MakefilesMartin Roth
2023-08-05src/*/post_code.h: Change post code prefix to POSTCODEYuchen He
2023-08-04cpu: Get rid of CPU_SPECIFIC_OPTIONSElyes Haouas
2023-07-12cpu/intel/microcode: Drop unnecessary alignment for split microcodeSubrata Banik
2023-07-08cpu: Enable per-CPUID microcode loading in CBFSSubrata Banik
2023-07-08cpu/intel/microcode: Avoid Pre-RAM microcode update if FIT enableSubrata Banik
2023-06-23commonlib/console/post_code.h: Change post code prefix to POSTCODElilacious
2023-05-27cpu/intel/haswell: Add Broadwell Trad µcode updatesAngel Pons
2023-05-25cpu/Kconfig: Remove MMX config optionArthur Heymans
2023-04-28treewide: Add missing include guards to chip.hJan Samek
2023-04-26cpu/intel/speedstep: Separate single SSDT CPU entryKyösti Mälkki
2023-04-17cpu,soc/intel: Separate single SSDT CPU entryKyösti Mälkki
2023-04-14cpu,soc/intel: Sync ACPI CPU object implementationsKyösti Mälkki
2023-04-14cpu,soc/intel: Use acpigen_write_processor_device()Elyes Haouas
2023-04-14cpu/intel/speedstep: Refactor P-state coordinationKyösti Mälkki
2023-04-14intel/i82371eb,speedstep: Use dev_count_cpu()Kyösti Mälkki
2023-02-09arch/x86/include/cpu: introduce CPU_TABLE_END CPU table terminatorFelix Held
2023-02-08cpu/intel/model_206ax/model_206ax_init: use CPUID_ALL_STEPPINGS_MASKFelix Held
2023-02-08arch/x86/cpu: introduce and use device_match_maskFelix Held
2023-02-08mb/samsung: Enable VBOOT_VBNV_FLASHYu-Ping Wu
2022-12-17Add option to use Ada code in romstageJeremy Compostella
2022-12-16cpu/intel: Fix clearing MTRR for clang 64bitArthur Heymans
2022-12-14cpu/intel/206ax: Fix generating C state entriesArthur Heymans
2022-12-05cpu/intel/speedstep: Have nb and sb code provide c5/c6/slfmArthur Heymans
2022-12-01cpu/intel/model_206ax: Remove fake lapic deviceArthur Heymans
2022-12-01cpu/intel/sandybridge: Use enum for ACPI C statesArthur Heymans
2022-11-28aopen/dxplplusu: Support SMM_ASEG and SMM_TSEGKyösti Mälkki
2022-11-25cpu/intel/model_2065x: Don't use a magic APICArthur Heymans
2022-11-25cpu/intel/haswell: Move chip_ops to cpu clusterArthur Heymans
2022-11-23cpu/intel/car: Define post codesMartin Roth
2022-11-22src/cpu: Remove unnecessary space after castsElyes Haouas
2022-11-21cpu/intel/socket_*: Clean up Kconfig filesElyes Haouas
2022-11-12cpu/intel/socket_mPGA604: Drop non-working SSE2 disablementKyösti Mälkki
2022-11-09Revert "mb/aopen/dxplplusu: Remove board"Kyösti Mälkki
2022-11-09cpu/*: Drop PARALLEL_MP leftoversArthur Heymans
2022-11-08cpu: Include <cpu/cpu.h> instead of <arch/cpu.h>Elyes Haouas
2022-11-07mb/aopen/dxplplusu: Remove boardArthur Heymans
2022-10-28cpu/intel/common: Fix typecasting issueSridhar Siricilla
2022-10-27mb/lenovo/haswell: Enable VBOOT_VBNV_FLASHYu-Ping Wu
2022-10-26cpu/intel: Clean up includesElyes Haouas
2022-10-06cpu/intel/common/fsb.c: Sorte includes and add <stdint.h>Elyes Haouas
2022-10-06cpu/intel/car/romstage.c: Clean up includes and add <types.h>Elyes Haouas
2022-09-29treewide: use is_enabled_cpu() on cycles over device listFabio Aiuto
2022-09-20cpu/intel/haswell: Update Broadwell ULT µcode updatesAngel Pons
2022-09-20cpu/intel/haswell: Hook up Crystal Well µcode updatesAngel Pons
2022-09-20cpu/intel/haswell: Do not include useless µcode updatesAngel Pons
2022-09-15cpu/intel/haswell: Allow up to six microcodes in the FIT tableJeremy Compostella
2022-07-17cpu: Get rid of unnecessary blank line {before,after} barceElyes HAOUAS
2022-07-14arch/x86: Mark prepare_and_run_postcar noreturnArthur Heymans
2022-06-26intel/microcode: Change log type from BIOS_ERR to BIOS_WARNINGSubrata Banik
2022-06-22microcode: Add error msg in case `intel_microcode_find()` return NULLSubrata Banik
2022-06-22cpu/intel/microcode: Create helper function to load microcode patchSubrata Banik
2022-06-22cpu/intel/microcode: Have API to re-load microcode patchSubrata Banik
2022-06-17cpu/intel/microcode: Fix `device enumeration` boot regressionSubrata Banik
2022-06-07arch/x86: Add a common romstage entryArthur Heymans
2022-06-07cpu/intel/microcode: Have provision to re-load microcode patchSubrata Banik
2022-06-02cpu/intel/model_fxx: Select SSE2Arthur Heymans
2022-06-01cbfs: Add CBFS_TYPE_INTEL_FIT and exclude it from CBFS verificationJulius Werner
2022-05-16arch/x86/postcar_loader.c: Change prepare_and_run_postcar signatureArthur Heymans
2022-05-05cpu/intel/model_2065x: Drop unused function declarationAngel Pons
2022-04-27cpu/intel/socket_p: Increase DCACHE_RAM_SIZEArthur Heymans
2022-04-27nb/intel/pineview: Use cbfs mcacheArthur Heymans
2022-04-24{arch,cpu}: Remove redundant <arch/cpu.h>Elyes HAOUAS
2022-04-24cpu/intel: Remove unused <acpi/acpi.h>Elyes HAOUAS
2022-04-01cpu/intel/fit: Clear the FIT table when setting pointerArthur Heymans
2022-03-09cpu/intel/common: Add support for energy performance preference (EPP)Cliff Huang
2022-03-08timestamps: Rename timestamps to make names more consistentJakub Czapiga
2022-02-24nb/intel/ironlake: Fix some quickpath init magicAngel Pons
2022-02-05cpu/x86/lapic: Move LAPIC configuration to MP initKyösti Mälkki
2022-02-05cpu,nb/intel: Drop remains of LAPIC_MONOTONIC_TIMERKyösti Mälkki
2022-02-02cpu/intel/common: Add `set_feature_ctrl_vmx_arg()`Angel Pons
2022-02-01cpu/x86/lapic: Drop SMM_SERIALIZED_INITIALIZATIONKyösti Mälkki
2022-01-27cpu/intel/socket_p: Drop 'select SSE'Elyes HAOUAS
2022-01-27cpu/intel/socket_m: Drop 'select SSE'Elyes HAOUAS
2022-01-27cpu/intel/socket_LGA775: Drop 'select SSE'Elyes HAOUAS
2022-01-27cpu/intel/socket_FCBGA559: Drop 'select SSE'Elyes HAOUAS
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