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path: root/src/cpu/intel
AgeCommit message (Expand)Author
2021-04-29cpu/x86/mtrr: Use a Kconfig for reserving MTRRs for OSTim Wawrzynczak
2021-04-23src: Replace remaining {get,set}_option() instancesAngel Pons
2021-04-15cpu/intel/common: use lapicid apiWonkyu Kim
2021-04-10cpu/intel/haswell: Use new fixed BAR accessorsAngel Pons
2021-03-19cpu/intel/fit: Reserve the FIT pointer using a .c fileArthur Heymans
2021-03-19cpu/intel/fit: Add the FIT table as a separate CBFS fileArthur Heymans
2021-03-12cpu/intel/microcode: Fix caching logic in intel_microcode_findFurquan Shaikh
2021-02-14cpu/intel/haswell: Constify ACPI c-state arraysAngel Pons
2021-02-14cpu/intel/haswell: Drop c-state table indirectionAngel Pons
2021-02-14cpu/intel/model_206ax: Drop c-state table indirectionAngel Pons
2021-02-14cpu/intel/model_206ax: Replace `generate_cstate_entries`Angel Pons
2021-02-12cpu/intel/haswell/acpi.c: Correct `get_cores_per_package`Angel Pons
2021-02-11src: Remove unused <arch/cpu.h>Elyes HAOUAS
2021-02-11cpu/intel/microcode: Fix typo in function parameterElyes HAOUAS
2021-02-02treewide [Kconfig]: Remove useless commentElyes HAOUAS
2021-02-01sb/intel/i82801gx,ix: Drop MPEN from GNVSKyösti Mälkki
2021-02-01cpu/intel/microcode: Reuse existing function to read MCU revisionArthur Heymans
2021-02-01soc/intel/*: Get rid of custom microcode cachingPatrick Rudolph
2021-01-28cpu/intel/socket_LGA775: Align CAR DCACHE_RAM_BASE to SIZEArthur Heymans
2021-01-28cpu/intel/microcode: Add caching layer in intel_microcode_findPatrick Rudolph
2021-01-28cpu/intel/common/fsb.c: Correct code styleFrans Hendriks
2021-01-28arch/x86: Remove most C_ENV_BOOTBLOCK_SIZE limitsKyösti Mälkki
2021-01-26cpu/intel/common/fsb.c: Add Broadwell CPUID modelsAngel Pons
2021-01-24cpu/intel/model_2065x: Drop configurable TDP copy-pastaAngel Pons
2021-01-24cpu/intel/model_2065x: Drop unused c-state codeAngel Pons
2021-01-24soc/intel/broadwell: Move romstage.c to HaswellAngel Pons
2021-01-24soc/intel/broadwell: Use Haswell CPU headersAngel Pons
2021-01-24cpu/intel/haswell: Add Broadwell CPUIDs and microcodeAngel Pons
2021-01-24cpu/intel/haswell: Set C9/C10 vccminAngel Pons
2021-01-24cpu/intel/haswell: Add fast ramp voltage for BroadwellAngel Pons
2021-01-22cpu/intel/haswell: Enable timed MWAIT if supportedAngel Pons
2021-01-21cpu/intel/haswell: Clean up CPUID definitionsAngel Pons
2021-01-21cpu/intel/haswell: Add s0ix supportAngel Pons
2021-01-21cpu/intel/socket_LGA775: Increase DCACHE_RAM_SIZEElyes HAOUAS
2021-01-18cpu/intel/smm/gen1/smmrelocate.c: Remove repeated wordElyes HAOUAS
2021-01-15build system: Always add coreboot.pre dependency to intermediatesPatrick Georgi
2021-01-15cpu/intel/haswell/acpi.c: Use C-state enum definitionsAngel Pons
2021-01-15cpu/intel/haswell: Factor out ACPI C-state valuesAngel Pons
2021-01-15cpu/intel/*init: Remove obsolete cache enablePatrick Rudolph
2021-01-15cpu/x86/mpinit: Serialize microcode updates for HT threadsPatrick Rudolph
2021-01-14build system: Structure and serialize INTERMEDIATEPatrick Georgi
2021-01-11cpu/intel/haswell: Add delay for TPM before Flex Ratio rebootAngel Pons
2021-01-11cpu/intel/haswell: Allow tuning VR for C-state operationsAngel Pons
2021-01-11cpu/intel/haswell: Raise PSI1 threshold to 20AAngel Pons
2021-01-11cpu/intel/haswell: Enable turbo ratio if availableAngel Pons
2021-01-11cpu/intel/haswell: Do not set PMG_IO_CAPTURE_BASE MSRAngel Pons
2021-01-10cpu/intel/haswell/haswell.h: Align with BroadwellAngel Pons
2021-01-10cpu/intel/haswell: Align cosmetics with BroadwellAngel Pons
2021-01-10cpu/intel/haswell: Do not determine CPU type at runtimeAngel Pons
2021-01-08cpu/intel/model_206ax: Always return a package from _CSTAngel Pons
2021-01-08*/Makefile.inc: Add some INTERMEDIATE targets to .PHONYArthur Heymans
2021-01-07arch/x86: Move prologue to .init sectionKyösti Mälkki
2021-01-07cpu/intel/haswell: Rename `HASWELL_BCLK` to `CPU_BCLK`Angel Pons
2021-01-06cpu/intel/model_206ax: Simplify C-state acpigenAngel Pons
2021-01-06cpu/intel/model_206ax: Rename `cX_acpower` optionsAngel Pons
2021-01-06cpu/intel/model_206ax: Unify ACPI C-state optionsAngel Pons
2021-01-06cpu/intel/x/chip.h: Drop unused `disable_acpi` settingAngel Pons
2020-12-25cpu/intel/model_206ax: Add more CPU steppingsAngel Pons
2020-12-25nb/intel/sandybridge: Move steppings to CPU headerAngel Pons
2020-12-14arch/x86: Combine bootblock linker scriptsKyösti Mälkki
2020-12-12nb/intel/sandybridge: Clean up stepping logicAngel Pons
2020-12-11Drop many cases of .previous directive useKyösti Mälkki
2020-12-02cbfs: Simplify load/map API names, remove type argumentsJulius Werner
2020-12-01cpu/intel/microcode: Mark assemblycode as 32bitPatrick Rudolph
2020-11-27Makefile.inc: Move adding mcu FIT entriesArthur Heymans
2020-11-22cpu/intel/common: Fill cpu voltage in SMBIOS tablesPatrick Rudolph
2020-11-21intel/socket_441: Increase bootblock sizeJulius Werner
2020-11-10cpu/x86/mtrr.h: Rename CORE2 alternative SMRR registersArthur Heymans
2020-11-10sec/intel/cbnt: Stitch in ACMs in the coreboot imageArthur Heymans
2020-11-09cpu/intel/model_206ax: Get CPU frequencies for SMBIOS type 4Michał Żygowski
2020-11-03cpu/intel/haswell: Move smmrelocate.c MSR definitions to headerAngel Pons
2020-11-02cpu/intel/car/non-evict/cache_as_ram.S: Add support for longmodePatrick Rudolph
2020-10-31{cpu,nb}/intel/haswell: Drop unnecessary `UL` suffixAngel Pons
2020-10-31cpu/intel/common: correct MSR for the Nominal Performance in CPPCMichael Niewöhner
2020-10-30cpu/intel/Makefile.inc: Use correct Kconfig symbolsAngel Pons
2020-10-26cpu/intel/common: implement the two missing CPPC v2 autonomous registersMichael Niewöhner
2020-10-24cpu/intel/common: rework code previously moved to common cpu codeMichael Niewöhner
2020-10-24{cpu,soc}/intel: deduplicate cpu codeMichael Niewöhner
2020-10-23haswell/broadwell: Fix typos of `BCLK`Angel Pons
2020-10-21cpu/intel/common: Fix regressionPatrick Rudolph
2020-10-21{cpu,soc}/intel: replace AES-NI locking by common implemenation callMichael Niewöhner
2020-10-20cpu/intel/model_{2065x,206ax}: fix AES-NI lockingMichael Niewöhner
2020-10-19cpu/intel/common: add a Kconfig to control AES-NI lockingMichael Niewöhner
2020-10-19cpu/intel/common: only lock AES-NI when supportedMichael Niewöhner
2020-10-19cpu/intel/common: rework AES-NI lockingMichael Niewöhner
2020-10-19soc/intel/skl,cpu/intel: copy AES-NI locking to common cpu codeMichael Niewöhner
2020-10-17cpu/intel,soc/intel: drop Kconfig for hyperthreadingMichael Niewöhner
2020-10-16include/cpu/x86: introduce new helper for (un)setting MSRsMichael Niewöhner
2020-10-14haswell/lynxpoint: Align cosmetics with BroadwellAngel Pons
2020-10-02drivers/spi: Add BOOT_DEVICE_SPI_FLASH_NO_EARLY_WRITES configShelley Chen
2020-09-28cpu/intel/206ax/acpi.c: Fix get_cores_per_packageEvgeny Zinoviev
2020-09-27cpu/intel/haswell/smmrelocate.c: Spell `CPU` in uppercaseAngel Pons
2020-09-27cpu/intel/haswell/haswell_init.c: Align printk's with BroadwellAngel Pons
2020-09-26arch/x86: Introduce `ARCH_ALL_STAGES_X86_32`Angel Pons
2020-09-21src/cpu: Drop unneeded empty linesElyes HAOUAS
2020-09-12cpu/intel/model_1067x: enable PECIMichael Büchler
2020-08-30cpu/intel/haswell: Set LT_LOCK_MEMORY MSR on finalize stepAngel Pons
2020-08-21cpu/intel/haswell: Select HAVE_ASAN_IN_ROMSTAGEHarshit Sharma
2020-08-18cpu/intel/common: Use macro for access_sizeElyes HAOUAS
2020-08-17cpu/intel/model_6fx: Include Conroe-L microcodeArthur Heymans
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