Age | Commit message (Expand) | Author |
2020-12-11 | Drop many cases of .previous directive use | Kyösti Mälkki |
2020-12-02 | cbfs: Simplify load/map API names, remove type arguments | Julius Werner |
2020-12-01 | cpu/intel/microcode: Mark assemblycode as 32bit | Patrick Rudolph |
2020-11-27 | Makefile.inc: Move adding mcu FIT entries | Arthur Heymans |
2020-11-22 | cpu/intel/common: Fill cpu voltage in SMBIOS tables | Patrick Rudolph |
2020-11-21 | intel/socket_441: Increase bootblock size | Julius Werner |
2020-11-10 | cpu/x86/mtrr.h: Rename CORE2 alternative SMRR registers | Arthur Heymans |
2020-11-10 | sec/intel/cbnt: Stitch in ACMs in the coreboot image | Arthur Heymans |
2020-11-09 | cpu/intel/model_206ax: Get CPU frequencies for SMBIOS type 4 | Michał Żygowski |
2020-11-03 | cpu/intel/haswell: Move smmrelocate.c MSR definitions to header | Angel Pons |
2020-11-02 | cpu/intel/car/non-evict/cache_as_ram.S: Add support for longmode | Patrick Rudolph |
2020-10-31 | {cpu,nb}/intel/haswell: Drop unnecessary `UL` suffix | Angel Pons |
2020-10-31 | cpu/intel/common: correct MSR for the Nominal Performance in CPPC | Michael Niewöhner |
2020-10-30 | cpu/intel/Makefile.inc: Use correct Kconfig symbols | Angel Pons |
2020-10-26 | cpu/intel/common: implement the two missing CPPC v2 autonomous registers | Michael Niewöhner |
2020-10-24 | cpu/intel/common: rework code previously moved to common cpu code | Michael Niewöhner |
2020-10-24 | {cpu,soc}/intel: deduplicate cpu code | Michael Niewöhner |
2020-10-23 | haswell/broadwell: Fix typos of `BCLK` | Angel Pons |
2020-10-21 | cpu/intel/common: Fix regression | Patrick Rudolph |
2020-10-21 | {cpu,soc}/intel: replace AES-NI locking by common implemenation call | Michael Niewöhner |
2020-10-20 | cpu/intel/model_{2065x,206ax}: fix AES-NI locking | Michael Niewöhner |
2020-10-19 | cpu/intel/common: add a Kconfig to control AES-NI locking | Michael Niewöhner |
2020-10-19 | cpu/intel/common: only lock AES-NI when supported | Michael Niewöhner |
2020-10-19 | cpu/intel/common: rework AES-NI locking | Michael Niewöhner |
2020-10-19 | soc/intel/skl,cpu/intel: copy AES-NI locking to common cpu code | Michael Niewöhner |
2020-10-17 | cpu/intel,soc/intel: drop Kconfig for hyperthreading | Michael Niewöhner |
2020-10-16 | include/cpu/x86: introduce new helper for (un)setting MSRs | Michael Niewöhner |
2020-10-14 | haswell/lynxpoint: Align cosmetics with Broadwell | Angel Pons |
2020-10-02 | drivers/spi: Add BOOT_DEVICE_SPI_FLASH_NO_EARLY_WRITES config | Shelley Chen |
2020-09-28 | cpu/intel/206ax/acpi.c: Fix get_cores_per_package | Evgeny Zinoviev |
2020-09-27 | cpu/intel/haswell/smmrelocate.c: Spell `CPU` in uppercase | Angel Pons |
2020-09-27 | cpu/intel/haswell/haswell_init.c: Align printk's with Broadwell | Angel Pons |
2020-09-26 | arch/x86: Introduce `ARCH_ALL_STAGES_X86_32` | Angel Pons |
2020-09-21 | src/cpu: Drop unneeded empty lines | Elyes HAOUAS |
2020-09-12 | cpu/intel/model_1067x: enable PECI | Michael Büchler |
2020-08-30 | cpu/intel/haswell: Set LT_LOCK_MEMORY MSR on finalize step | Angel Pons |
2020-08-21 | cpu/intel/haswell: Select HAVE_ASAN_IN_ROMSTAGE | Harshit Sharma |
2020-08-18 | cpu/intel/common: Use macro for access_size | Elyes HAOUAS |
2020-08-17 | cpu/intel/model_6fx: Include Conroe-L microcode | Arthur Heymans |
2020-08-11 | cpu/intel: Remove Core 2 Duo E8200 CPUID from model_6fx | Angel Pons |
2020-08-06 | cpu/intel/common: Add `intel_ht_supported` function | Angel Pons |
2020-08-03 | cpu/intel/haswell: add Crystal Well CPU IDs | Iru Cai |
2020-08-03 | cpu/intel/common/fsb.c: add Crystal Well support | Iru Cai |
2020-07-26 | cpu/intel/car/romstage.c: Remove unused <bootblock_common.h> | Elyes HAOUAS |
2020-07-26 | src: Change BOOL CONFIG_ to CONFIG() in comments & strings | Martin Roth |
2020-07-26 | cpu,soc/intel: Drop select SMP | Kyösti Mälkki |
2020-07-26 | cpu/intel/model_206ax: Clean up includes | Elyes HAOUAS |
2020-07-26 | src: Remove unused 'include <cpu/intel/common/common.h> | Elyes HAOUAS |
2020-07-14 | cpu/intel/model_1067x: Drop <cpu/x86/mp.h> include | Elyes HAOUAS |
2020-07-14 | src: Remove unused 'include <cpu/x86/msr.h>' | Elyes HAOUAS |
2020-07-14 | src: Remove unused 'include <types.h>' | Elyes HAOUAS |
2020-07-10 | cpu/intel/haswell/finalize.c: Drop dead code | Angel Pons |
2020-07-09 | cpu/intel/model_2065x/model_2065x_init.c: Drop dead code | Angel Pons |
2020-07-09 | cpu/intel/model_206ax/finalize.c: Drop dead code | Angel Pons |
2020-07-08 | haswell: relocate `romstage_common` to northbridge | Angel Pons |
2020-07-08 | nb/intel/haswell: Drop unnecessary variable | Angel Pons |
2020-07-08 | haswell: drop unused function parameter | Angel Pons |
2020-06-22 | cpu/x86/lapic: Support x86_64 and clean up code | Patrick Rudolph |
2020-06-16 | sb,soc/intel: Replace smm_southbridge_enable_smi() | Kyösti Mälkki |
2020-06-15 | gm45 boards: Factor out MAX_CPUS | Angel Pons |
2020-06-15 | pineview boards: Factor out MAX_CPUS | Angel Pons |
2020-06-15 | haswell boards: Factor out MAX_CPUS | Angel Pons |
2020-06-15 | arrandale boards: Factor out MAX_CPUS | Angel Pons |
2020-06-15 | sandybridge boards: Factor out MAX_CPUS | Angel Pons |
2020-06-15 | cpu/intel: Remove obsolete comment in CAR setup | Kyösti Mälkki |
2020-06-15 | arch/x86: Remove NO_FIXED_XIP_ROM_SIZE | Kyösti Mälkki |
2020-06-13 | cpu/intel/car: Use symbols for CAR MTRR setup | Kyösti Mälkki |
2020-06-06 | src: Remove unused 'include <cpu/x86/mtrr.h>' | Elyes HAOUAS |
2020-06-06 | cpu/intel/haswell: Remove unused 'include <cpu/x86/bist.h>' | Elyes HAOUAS |
2020-06-06 | src: Remove unused '#include <cpu/x86/smm.h>' | Elyes HAOUAS |
2020-06-04 | cpu/intel/slot_1: Select 16KiB bootblock if console is enabled | Keith Hui |
2020-06-02 | src: Remove unused '#include <cpu/x86/lapic.h>' | Elyes HAOUAS |
2020-05-28 | arch/x86: Remove more romcc leftovers | Kyösti Mälkki |
2020-05-28 | cpu/intel/common: Fix typo in comment | Elyes HAOUAS |
2020-05-18 | src: Remove leading blank lines from SPDX header | Elyes HAOUAS |
2020-05-13 | src: Remove unused '#include <stdint.h>' | Elyes HAOUAS |
2020-05-11 | treewide: Remove "this file is part of" lines | Patrick Georgi |
2020-05-10 | src/cpu: Replace GPLv2 long form headers with SPDX header | Elyes HAOUAS |
2020-05-09 | src/: Replace GPL boilerplate with SPDX headers | Patrick Georgi |
2020-05-06 | treewide: replace GPLv2 long form headers with SPDX header | Patrick Georgi |
2020-05-06 | treewide: Move "is part of the coreboot project" line in its own comment | Patrick Georgi |
2020-05-02 | acpi: Move ACPI table support out of arch/x86 (3/5) | Furquan Shaikh |
2020-05-01 | src: Remove unused 'include <cpu/x86/cache.h>' | Elyes HAOUAS |
2020-04-28 | device: Constify struct device * parameter to acpi_fill_ssdt() | Furquan Shaikh |
2020-04-04 | src/cpu: Use SPDX for GPL-2.0-only files | Angel Pons |
2020-03-23 | acpi: Change Processor ACPI Name (Intel only) | Christian Walter |
2020-03-15 | cpu/intel/model_2065x: Add missing CPU IDs | Angel Pons |
2020-03-15 | treewide: Replace uses of "Nehalem" | Angel Pons |
2020-03-15 | nb/intel/nehalem: Rename to ironlake | Angel Pons |
2020-03-04 | cpu/intel/model_206ax: Lock MSR on all cores | Patrick Rudolph |
2020-03-03 | cpu/intel/slot_1: Cache romstage XIP execution | Arthur Heymans |
2020-02-24 | src: capitalize 'RAM' | Elyes HAOUAS |
2020-02-09 | cpu/intel: Drop unused file | Elyes HAOUAS |
2020-01-18 | cpu/intel/model_6?x{slot_1}: Leave enabling CONFIG_SMP to the mainboard | Keith Hui |
2020-01-09 | drivers/pc80/rtc: Separate {get|set}_option() prototypes | Kyösti Mälkki |
2019-12-27 | cpu/intel/microcode: Apply more strict guard for assembly files | Kyösti Mälkki |
2019-12-26 | src/x86|cpu/intel: Hardcode FIT and ID | Marshall Dawson |
2019-12-19 | arch/x86,soc/intel: Drop RESET_ON_INVALID_RAMSTAGE_CACHE | Kyösti Mälkki |
2019-12-19 | src: Remove unused 'include <arch/cpu.h>' | Elyes HAOUAS |
2019-12-19 | src: Use '#include <smp/node.h>' when appropriate | Elyes HAOUAS |