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path: root/src/cpu/intel
AgeCommit message (Expand)Author
2019-01-24cpu/intel: Configure IA32_FEATURE_CONTROL for alternative SMRRArthur Heymans
2019-01-24cpu/intel/model_406dx: Remove the notion of CPU socketsArthur Heymans
2019-01-24cpu/intel/model_206ax: Remove the notion of socketsArthur Heymans
2019-01-23nb/intel/pineview: Use parallel MP initArthur Heymans
2019-01-23nb/intel/x4x: Use parallel MP initArthur Heymans
2019-01-23nb/intel/i945: Use parallel MP initArthur Heymans
2019-01-23nb/intel/gm45: Use parallel MP initArthur Heymans
2019-01-22cpu/intel/model_206ax: Use parallel MP initArthur Heymans
2019-01-22cpu/intel/smm/gen1: Add pineview to the check for alt SMRR MSR'sArthur Heymans
2019-01-17cpu/intel/car: Remove unneeded white spaceElyes HAOUAS
2019-01-16buildsystem: Promote rules.h to default includeKyösti Mälkki
2019-01-15cpu/intel/socket_FCBGA559: Use the non-evict cache as ram setupArthur Heymans
2019-01-14cpu/intel/gen1/smmrelocate: Check for sanity on SMRRArthur Heymans
2019-01-14cpu/intel/car/non-evict: Update microcode in CAR setupArthur Heymans
2019-01-13aopen/dxplplusu: Switch to C_ENVIRONMENT_BOOTBLOCKKyösti Mälkki
2019-01-13arch/x86: Drop Kconfig AP_SIPI_VECTORKyösti Mälkki
2019-01-13cpu/intel/car/p4: Update microcode in CAR setupArthur Heymans
2019-01-11cpu/intel/microcode: Support update before CAR entryArthur Heymans
2019-01-103rdparty/blobs: Update for current Intel microcodeNico Huber
2019-01-10Untangle CBFS microcode updatesNico Huber
2019-01-09cpu/intel: Use the common code to initialize the romstage timestampsArthur Heymans
2019-01-09cpu/intel/common: Fix generated exception if not supported VMXElyes HAOUAS
2019-01-09cpu/intel/microcode_asm.S: Fix reading cpuid(1) and checking PFArthur Heymans
2019-01-08arch/x86: Link walkcbfs.S instead of including itArthur Heymans
2019-01-08cpu/intel/car/bootblock.c: Report BIST failuresArthur Heymans
2019-01-08cpu/intel/car: Enable use of C_ENVIRONMENT_BOOTBLOCKArthur Heymans
2019-01-08cpu/intel/car: Prepare for C_ENVIRONMENT_BOOTBLOCKKyösti Mälkki
2019-01-06device: Use pcidev_on_root()Kyösti Mälkki
2019-01-05cpu/intel/common: improve debug outputMatt DeVillier
2019-01-03nb/intel/haswell: Add support for PEGTristan Corrick
2018-12-31src/cpu/microcode: Add code to update microcode in assemblyArthur Heymans
2018-12-30arch/x86: Add CAR stack location symbolsKyösti Mälkki
2018-12-30cpu/intel/car: Drop remains of setup_stack_and_mtrrs()Kyösti Mälkki
2018-12-28src/cpu/intel/model_f4x: Update cpu_tableElyes HAOUAS
2018-12-28arch/x86: SSE2 implies SSE supportKyösti Mälkki
2018-12-28soc/intel: Drop romstage_after_car()Kyösti Mälkki
2018-12-24car/non-evict/exit_car.S: Use tabs instead of white spacesElyes HAOUAS
2018-12-21car/non-evict/cache_as_ram.S: Use tabs instead of spacesArthur Heymans
2018-12-20cpu/intel/common: decouple IA32_FEATURE_CONTROL lock from set_vmx()Matt DeVillier
2018-12-18cpu: Remove unneeded include <pc80/mc146818rtc.h>Elyes HAOUAS
2018-12-13cpuid: Add helper function for cpuid(1) functionsSubrata Banik
2018-12-03cpu/intel/fsp_model_406dx: Drop dead microcode referenceNico Huber
2018-12-03nb/intel/i945: Use common SMM_TSEG codeArthur Heymans
2018-11-30cpu/intel/common: Use a common acpi/cpu.asl fileArthur Heymans
2018-11-30cpu/intel/fsp_model_406dx: Rework acpi/cpu.aslArthur Heymans
2018-11-30cpu/intel/model_206{5,a}x: Rework acpi/cpu.aslArthur Heymans
2018-11-30cpu/intel/haswell: Rework acpi/cpu.aslArthur Heymans
2018-11-29arch/x86/acpigen.c: Add a method to notify all CPU coresArthur Heymans
2018-11-21src/cpu/intel/Kconfig: Remove dead sourceElyes HAOUAS
2018-11-19northbridge/intel/fsp_*: Remove legacy SoCszaolin
2018-11-19cpu/intel/socket_mFCPGA478/Kconfig: Add MODEL_6{9,D}XElyes HAOUAS
2018-11-16src: Remove unneeded include <cbfs.h>Elyes HAOUAS
2018-11-15src/cpu: Remove dead sourced linesElyes HAOUAS
2018-11-12src: Remove unneeded include "{arch,cpu}/cpu.h"Elyes HAOUAS
2018-11-01cpu/intel/haswell: Only change the slow ramp rate for ULT CPUsTristan Corrick
2018-11-01cpu/intel/haswell: Allow use of TSC for the monotonic timerTristan Corrick
2018-11-01cpu/intel/haswell: Add the CPUID for Haswell C0 CPUsTristan Corrick
2018-10-30src: Add missing include <stdint.h>Elyes HAOUAS
2018-10-24cpu/intel/smm: Don't make assumptions on TSEG_SIZEArthur Heymans
2018-10-22intel: Use CF9 reset (part 1)Patrick Rudolph
2018-10-11src: Move common IA-32 MSRs to <cpu/x86/msr.h>Elyes HAOUAS
2018-10-11src: Replace MSR addresses with macrosElyes HAOUAS
2018-10-08Move compiler.h to commonlibNico Huber
2018-10-05src: Fix MSR_PKG_CST_CONFIG_CONTROL register nameElyes HAOUAS
2018-10-04cpu/intel/car: Fix typoElyes HAOUAS
2018-09-28src/*: normalize Google copyright headersPatrick Georgi
2018-09-26cpu/intel/model_206ax: detect number of MCE banksDan Elkouby
2018-09-18cpu/*/car: fix ancient URL explaining XIP range run-time calculationStefan Tauner
2018-08-20cpu/intel/common: add function to init cppc_configMatt Delco
2018-08-17intel/socket_mPGA604: Keep only model f2xKyösti Mälkki
2018-08-13src: Get rid of non-local header treated as localElyes HAOUAS
2018-08-13cpu/intel/car: Align the stack to 16 bytes before romstage_mainArthur Heymans
2018-08-09src/cpu: Fix typoElyes HAOUAS
2018-08-09cpu/intel/smm: Make sure SMRR base is aligned to SMRR sizeArthur Heymans
2018-07-30nb/intel/gm45: Use common code for SMM in TSEGArthur Heymans
2018-07-30cpu/intel/smm/gen1: Use correct MSR for model_6fx and model_1067xArthur Heymans
2018-07-30cpu/intel/microcode: Add helper functions to get microcode infoRizwan Qureshi
2018-07-28nb/intel/sandybridge: Move CPU report to cpu folderPatrick Rudolph
2018-07-28intel/sandybridge: Don't hardcode platform typePatrick Rudolph
2018-07-25drivers/tpm: Add TPM ramstage driver for devices without vboot.Philipp Deppenwiese
2018-07-24cpu/x86/mtrr.h: Rename MSR SMRR_PHYS_x to IA32_SMRR_PHYSxArthur Heymans
2018-07-09src/{arch,commonlib,cpu}: Use "foo *bar" instead of "foo* bar"Elyes HAOUAS
2018-06-27cpu/intel/p4-netburst: skip caching rom on model_fxxArthur Heymans
2018-06-27x86/car: Replace reference of copy_and_run locationKyösti Mälkki
2018-06-21Revert "sb/intel/{bd82x6,ibexpeak}: Move RCBA macros to a common location"Arthur Heymans
2018-06-17nb/intel/i440bx: Switch to POSTCAR_STAGEKyösti Mälkki
2018-06-17cpu/intel/car/p3: Use variable MTRR countKyösti Mälkki
2018-06-17cpu/intel/slot_1: Switch to different CAR setupKyösti Mälkki
2018-06-17cpu/intel/car: Remove obsolete filesKyösti Mälkki
2018-06-14cpu/intel/haswell: Use the common intel romstage_main functionArthur Heymans
2018-06-06arch/x86: Make RELOCATABLE_RAMSTAGE the defaultKyösti Mälkki
2018-06-06cpu/intel/model_{6xx,f2x,f3x,f4x}: Remove unneeded includeElyes HAOUAS
2018-06-05cpu/intel/haswell: Switch to POSTCAR_STAGEArthur Heymans
2018-06-05cpu/intel/model_2065x: Switch to POSTCAR_STAGEArthur Heymans
2018-06-05cpu/intel/model_206ax: Switch to POSTCAR_STAGEArthur Heymans
2018-06-05cpu/intel/car/non-evict: Improve a few thingsArthur Heymans
2018-06-05cpu/intel/car/non-evict: Prepare for some POSTCAR_STAGE supportArthur Heymans
2018-06-05nb/intel/gm45: Switch to POSTCAR_STAGEArthur Heymans
2018-06-05nb/intel/x4x: Switch to POSTCAR_STAGEArthur Heymans
2018-06-05nb/intel/pineview: Switch to POSTCAR_STAGEArthur Heymans