| Age | Commit message (Expand) | Author |
|---|---|---|
| 2022-04-27 | cpu/intel/socket_p: Increase DCACHE_RAM_SIZE | Arthur Heymans |
| 2022-01-27 | cpu/intel/socket_p: Drop 'select SSE' | Elyes HAOUAS |
| 2021-10-26 | cpu/intel/*/Kconfig: move selection of CPU_X86_CACHE_HELPER | Felix Held |
| 2021-10-26 | cpu/x86: Introduce `CPU_X86_CACHE_HELPER` | Felix Held |
| 2021-10-25 | cpu,soc/x86: always include cpu/x86/mtrr on x86 CPUs/SoCs | Felix Held |
| 2021-09-08 | cpu/x86/tsc: Deduplicate Makefile logic | Angel Pons |
| 2021-06-07 | cpu/intel/hyperthreading: Build only for selected models | Kyösti Mälkki |
| 2021-05-18 | cpu/x86: Only include smm code if CONFIG_HAVE_SMI_HANDLER=y | Arthur Heymans |
| 2020-06-15 | gm45 boards: Factor out MAX_CPUS | Angel Pons |
| 2019-10-28 | nb/intel/gm45: Add C_ENVIRONMENT_BOOTBLOCK support | Arthur Heymans |
| 2019-02-28 | cpu/intel: Rename socket_mPGA478MN to socket_p | Nico Huber |
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index : coreboot.git | |
| my copy of coreboot | gitea |
| aboutsummaryrefslogtreecommitdiff |