| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2016-07-22 | intel model_106cx: Include CAR from socket directory | Kyösti Mälkki | |
| Since the socket layer is implemented with this CPU model, there could potentially be multiple CPU models included. There can be only one cache_as_ram include, so select it directly within the socket directory. Change-Id: Ia52bb152276eddfd1fb33ddb7f5d153ab8e8163c Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/15757 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Aaron Durbin <adurbin@chromium.org> | |||
| 2015-11-24 | cpu/intel/socket_FCBGA559: Add new socket for Atom D5xx | Damien Zammit | |
| Tested on Intel D510MO board, boots to UART console. Change-Id: I82a630c9836c099d0fcc62e019c20f328a75151d Signed-off-by: Damien Zammit <damien@zamaudio.com> Reviewed-on: http://review.coreboot.org/10066 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com> | |||
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index : coreboot.git | |
| my copy of coreboot | gitea |
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