| Age | Commit message (Expand) | Author |
|---|---|---|
| 2014-05-06 | Introduce stage-specific architecture for coreboot | Furquan Shaikh |
| 2014-05-03 | Move ARCH_* from board/Kconfig to cpu or soc Kconfig. | Furquan Shaikh |
| 2014-02-12 | PCI: Drop includes under cpu | Kyösti Mälkki |
| 2014-01-16 | cpu/intel: Remove dummy terminators from microcode blobs | Alexandru Gagniuc |
| 2014-01-16 | cpu/intel: Make all Intel CPUs load microcode from CBFS | Alexandru Gagniuc |
| 2013-03-01 | GPLv2 notice: Unify all files to just use one space in »MA 02110-1301« | Paul Menzel |
| 2012-11-27 | Get rid of drivers class | Patrick Georgi |
| 2012-01-10 | MTRR: get physical address size from CPUID | Sven Schnelle |
| 2011-08-04 | cpu/intel/slot_1: Init L2 cache on SECC(2) CPUs. | Keith Hui |
| 2010-10-18 | update intel microcode files. | Stefan Reinauer |
| 2010-10-16 | Move support for Deschutes Slot 1 CPUs (model_65x) into its own directory. | Keith Hui |
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index : coreboot.git | |
| my copy of coreboot | User & |
| summaryrefslogtreecommitdiff |