| Age | Commit message (Expand) | Author |
|---|---|---|
| 2014-10-27 | {arch,cpu,drivers,ec}: Don't hide pointers behind typedefs | Edward O'Callaghan |
| 2014-02-12 | PCI: Drop includes under cpu | Kyösti Mälkki |
| 2014-01-16 | cpu/intel: Make all Intel CPUs load microcode from CBFS | Alexandru Gagniuc |
| 2012-01-10 | MTRR: get physical address size from CPUID | Sven Schnelle |
| 2011-08-04 | cpu/intel/slot_1: Init L2 cache on SECC(2) CPUs. | Keith Hui |
| 2010-10-18 | update intel microcode files. | Stefan Reinauer |
| 2010-10-16 | Move support for Deschutes Slot 1 CPUs (model_65x) into its own directory. | Keith Hui |
 |
index : coreboot.git | |
| my copy of coreboot | gitea |
| aboutsummaryrefslogtreecommitdiff |