| Age | Commit message (Expand) | Author |
|---|
| 2019-06-21 | cpu/intel/{haswell,model_206{5,a}x}: Use MSR_CORE_THREAD_COUNT for msr at 0x35 | Elyes HAOUAS |
| 2019-05-12 | nb/intel/snb: Drop NORTHBRIDGE_INTEL_IVYBRIDGE | Nico Huber |
| 2019-04-25 | cpu/intel/car/non-evict: Select NO_FIXED_XIP_ROM_SIZE | Arthur Heymans |
| 2019-04-23 | src: include <assert.h> when appropriate | Elyes HAOUAS |
| 2019-03-20 | src: Use 'include <string.h>' when appropriate | Elyes HAOUAS |
| 2019-03-08 | coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX) | Julius Werner |
| 2019-03-04 | arch/x86/acpi: Remove obsolete acpi_gen_regaddr resv field | Elyes HAOUAS |
| 2019-02-25 | security/vboot: Add measured boot mode | Philipp Deppenwiese |
| 2019-01-24 | cpu/intel/model_206ax: Remove the notion of sockets | Arthur Heymans |
| 2019-01-22 | cpu/intel/model_206ax: Use parallel MP init | Arthur Heymans |
| 2018-12-20 | cpu/intel/common: decouple IA32_FEATURE_CONTROL lock from set_vmx() | Matt DeVillier |
| 2018-12-13 | cpuid: Add helper function for cpuid(1) functions | Subrata Banik |
| 2018-11-30 | cpu/intel/common: Use a common acpi/cpu.asl file | Arthur Heymans |
| 2018-11-30 | cpu/intel/model_206{5,a}x: Rework acpi/cpu.asl | Arthur Heymans |
| 2018-11-12 | src: Remove unneeded include "{arch,cpu}/cpu.h" | Elyes HAOUAS |
| 2018-10-30 | src: Add missing include <stdint.h> | Elyes HAOUAS |
| 2018-10-11 | src: Move common IA-32 MSRs to <cpu/x86/msr.h> | Elyes HAOUAS |
| 2018-10-05 | src: Fix MSR_PKG_CST_CONFIG_CONTROL register name | Elyes HAOUAS |
| 2018-09-26 | cpu/intel/model_206ax: detect number of MCE banks | Dan Elkouby |
| 2018-08-09 | src/cpu: Fix typo | Elyes HAOUAS |
| 2018-07-28 | nb/intel/sandybridge: Move CPU report to cpu folder | Patrick Rudolph |
| 2018-07-28 | intel/sandybridge: Don't hardcode platform type | Patrick Rudolph |
| 2018-06-21 | Revert "sb/intel/{bd82x6,ibexpeak}: Move RCBA macros to a common location" | Arthur Heymans |
| 2018-06-05 | cpu/intel/model_206ax: Switch to POSTCAR_STAGE | Arthur Heymans |
| 2018-06-05 | cpu/intel/car/non-evict: Prepare for some POSTCAR_STAGE support | Arthur Heymans |
| 2018-04-30 | cpu/intel: Get rid of device_t | Elyes HAOUAS |
| 2018-04-11 | Revert "model_206ax: Use parallel MP init" | Arthur Heymans |
| 2018-04-11 | model_206ax: Use parallel MP init | Arthur Heymans |
| 2018-04-10 | cpu/intel/sandybridge: Put stage cache into TSEG | Arthur Heymans |
| 2018-02-27 | sb/intel/{bd82x6,ibexpeak}: Move RCBA macros to a common location | Arthur Heymans |
| 2017-11-23 | Constify struct cpu_device_id instances | Jonathan Neuschäfer |
| 2017-08-19 | arch/x86: Clean up CONFIG_SMP and MAX_CPUS test | Kyösti Mälkki |
| 2017-06-28 | cpu/intel: add IS_ENABLED() around Kconfig symbol references | Martin Roth |
| 2017-06-09 | cpu/intel/model_206ax: Use tsc monotonic timer | Patrick Rudolph |
| 2017-06-07 | Use more secure HTTPS URLs for coreboot sites | Paul Menzel |
| 2017-03-16 | cpu/intel: Add int to unsigned | Lee Leahy |
| 2017-03-16 | cpu/intel: Fix the spacing issues | Lee Leahy |
| 2017-03-16 | cpu/intel: Indent with tabs | Lee Leahy |
| 2016-12-27 | cpu/intel/common: Add/Use common function to set virtualization | Matt DeVillier |
| 2016-12-09 | intel/sandybridge: Use postcar_frame for MTRR setup | Kyösti Mälkki |
| 2016-11-20 | intel sandy/ivy: Increase XIP cache with USE_NATIVE_RAMINIT | Kyösti Mälkki |
| 2016-11-18 | intel/sandybridge post-car: Redo MTRR settings and stack selection | Kyösti Mälkki |
| 2016-11-11 | intel cache-as-ram: Unify stack setup | Kyösti Mälkki |
| 2016-11-11 | intel/sandybridge: Use common ACPI S3 recovery | Kyösti Mälkki |
| 2016-08-23 | src/cpu: Capitalize CPU, APIC and IOAPIC typo fix | Elyes HAOUAS |
| 2016-07-31 | src/cpu: Capitalize CPU | Elyes HAOUAS |
| 2016-07-31 | src/cpu: Capitalize ROM and RAM | Elyes HAOUAS |
| 2016-07-26 | intel sandy/ivy: Redefine DCACHE_RAM_SIZE and DCACHE_RAM_MRC_VAR_SIZE | Kyösti Mälkki |
| 2016-07-22 | intel car: Unify postcodes | Kyösti Mälkki |
| 2016-07-22 | intel car: Unify whitespace and comment fixes | Kyösti Mälkki |
| 2016-06-22 | Ignore RAMTOP for MTRRs | Kyösti Mälkki |
| 2016-06-22 | intel/model_206ax: Prepare for dynamic CONFIG_RAMTOP | Kyösti Mälkki |
| 2016-06-17 | intel/model_206ax: Move platform specific defines | Kyösti Mälkki |
| 2016-06-17 | Move definitions of HIGH_MEMORY_SAVE | Kyösti Mälkki |
| 2016-03-08 | x86 chipsets: utilize x86_setup_mtrrs_with_detect() | Aaron Durbin |
| 2015-10-31 | tree: drop last paragraph of GPL copyright header | Patrick Georgi |
| 2015-10-31 | sandybridge: Disable parallel CPU initialization | Nico Huber |
| 2015-10-15 | cpu/mtrr.h: Fix macro names for MTRR registers | Alexandru Gagniuc |
| 2015-09-30 | cpu: microcode: Use microcode stored in binary format | Alexandru Gagniuc |
| 2015-09-04 | x86: remove cpu_incs as romstage Make variable | Aaron Durbin |
| 2015-08-25 | Intel: Remove CACHE_MRC_BIN - 'selected' everywhere in Kconfig | Martin Roth |
| 2015-07-07 | x86: Drop -Wa,--divide | Stefan Reinauer |
| 2015-06-10 | model_206ax: Fix APIC map when HT is disabled. | Vladimir Serbinenko |
| 2015-06-09 | Create i945-ivy smm tseg init based on ivy code. | Vladimir Serbinenko |
| 2015-06-08 | Remove empty lines at end of file | Elyes HAOUAS |
| 2015-06-05 | device_ops: add device_t argument to acpi_fill_ssdt_generator | Alexander Couzens |
| 2015-06-04 | Remove address from GPLv2 headers | Patrick Georgi |
| 2015-05-28 | smm: Merge configs SMM_MODULES and SMM_TSEG | Vladimir Serbinenko |
| 2015-05-28 | Migrate 206ax to SMM_MODULES | Vladimir Serbinenko |
| 2015-05-28 | intel: Remove pstate_coord_type. | Vladimir Serbinenko |
| 2015-05-26 | acpigen: Remove all explicit length tracking | Vladimir Serbinenko |
| 2015-05-21 | Remove address from GPLv2 headers | Patrick Georgi |
| 2015-05-13 | Include back the 306ax microcode again. | Vladimir Serbinenko |
| 2015-05-05 | 3rdparty: move to 3rdparty/blobs | Patrick Georgi |
| 2015-05-05 | 3rdparty: Move to blobs | Patrick Georgi |
| 2015-02-28 | cpu/intel: (non-FSP) Remove microcode updates from tree | Alexandru Gagniuc |
| 2015-02-28 | cpu/intel (non-FSP): Use microcode from blobs repository | Alexandru Gagniuc |
| 2015-02-16 | acpi: Generate valid ACPI processor objects | Timothy Pearson |
| 2015-02-11 | cpu/intel: >= nehalem: add comments to msr finalize's | Alexander Couzens |
| 2015-01-27 | vboot2: add verstage | Stefan Reinauer |
| 2015-01-03 | intel/model_206ax: update microcode | Nicolas Reinecke |
| 2014-12-02 | Replace hlt with halt() | Patrick Georgi |
| 2014-11-19 | acpigen: Add and use acpigen_write_method. | Vladimir Serbinenko |
| 2014-11-09 | ibexpeak, bd82x6x: Move to implicit length patching | Vladimir Serbinenko |
| 2014-10-27 | {arch,cpu,drivers,ec}: Don't hide pointers behind typedefs | Edward O'Callaghan |
| 2014-10-19 | x86 romstage: Move stack just below RAMTOP | Kyösti Mälkki |
| 2014-10-16 | ACPI: Remove CONFIG_GENERATE_ACPI_TABLES | Vladimir Serbinenko |
| 2014-08-12 | cpu/intel/XXX/acpi.c: Fix coding style violation | Martin Roth |
| 2014-08-04 | cpu/intel: Fix out-of-bounds read due to off-by-one in condition | Edward O'Callaghan |
| 2014-07-08 | cpu: Trivial - drop trailing blank lines at EOF | Edward O'Callaghan |
| 2014-07-05 | intel: Make monotonic timer a first class citizen | Edward O'Callaghan |
| 2014-05-10 | Replace SERIAL_CPU_INIT with PARALLEL_CPU_INIT | Kyösti Mälkki |
| 2014-05-06 | Introduce stage-specific architecture for coreboot | Furquan Shaikh |
| 2014-05-03 | Move ARCH_* from board/Kconfig to cpu or soc Kconfig. | Furquan Shaikh |
| 2014-04-26 | Rename coreboot_ram stage to ramstage | Furquan Shaikh |
| 2014-02-12 | PCI: Drop includes under cpu | Kyösti Mälkki |
| 2014-01-23 | intel/microcode: Remove leftover MICROCODE_INCLUDE_PATH. | Vladimir Serbinenko |
| 2014-01-16 | cpu/intel: Remove dummy terminators from microcode blobs | Alexandru Gagniuc |
| 2014-01-15 | nehalem/sandy/ivy/haswell: Enable WRPROT cache for all of flash | Kyösti Mälkki |
| 2014-01-15 | Re-declare CACHE_ROM_SIZE as aligned ROM_SIZE for MTRR | Kyösti Mälkki |
