Age | Commit message (Expand) | Author |
2016-12-27 | cpu/intel/common: Add/Use common function to set virtualization | Matt DeVillier |
2016-12-09 | intel/sandybridge: Use postcar_frame for MTRR setup | Kyösti Mälkki |
2016-11-20 | intel sandy/ivy: Increase XIP cache with USE_NATIVE_RAMINIT | Kyösti Mälkki |
2016-11-18 | intel/sandybridge post-car: Redo MTRR settings and stack selection | Kyösti Mälkki |
2016-11-11 | intel cache-as-ram: Unify stack setup | Kyösti Mälkki |
2016-11-11 | intel/sandybridge: Use common ACPI S3 recovery | Kyösti Mälkki |
2016-08-23 | src/cpu: Capitalize CPU, APIC and IOAPIC typo fix | Elyes HAOUAS |
2016-07-31 | src/cpu: Capitalize CPU | Elyes HAOUAS |
2016-07-31 | src/cpu: Capitalize ROM and RAM | Elyes HAOUAS |
2016-07-26 | intel sandy/ivy: Redefine DCACHE_RAM_SIZE and DCACHE_RAM_MRC_VAR_SIZE | Kyösti Mälkki |
2016-07-22 | intel car: Unify postcodes | Kyösti Mälkki |
2016-07-22 | intel car: Unify whitespace and comment fixes | Kyösti Mälkki |
2016-06-22 | Ignore RAMTOP for MTRRs | Kyösti Mälkki |
2016-06-22 | intel/model_206ax: Prepare for dynamic CONFIG_RAMTOP | Kyösti Mälkki |
2016-06-17 | intel/model_206ax: Move platform specific defines | Kyösti Mälkki |
2016-06-17 | Move definitions of HIGH_MEMORY_SAVE | Kyösti Mälkki |
2016-03-08 | x86 chipsets: utilize x86_setup_mtrrs_with_detect() | Aaron Durbin |
2015-10-31 | tree: drop last paragraph of GPL copyright header | Patrick Georgi |
2015-10-31 | sandybridge: Disable parallel CPU initialization | Nico Huber |
2015-10-15 | cpu/mtrr.h: Fix macro names for MTRR registers | Alexandru Gagniuc |
2015-09-30 | cpu: microcode: Use microcode stored in binary format | Alexandru Gagniuc |
2015-09-04 | x86: remove cpu_incs as romstage Make variable | Aaron Durbin |
2015-08-25 | Intel: Remove CACHE_MRC_BIN - 'selected' everywhere in Kconfig | Martin Roth |
2015-07-07 | x86: Drop -Wa,--divide | Stefan Reinauer |
2015-06-10 | model_206ax: Fix APIC map when HT is disabled. | Vladimir Serbinenko |
2015-06-09 | Create i945-ivy smm tseg init based on ivy code. | Vladimir Serbinenko |
2015-06-08 | Remove empty lines at end of file | Elyes HAOUAS |
2015-06-05 | device_ops: add device_t argument to acpi_fill_ssdt_generator | Alexander Couzens |
2015-06-04 | Remove address from GPLv2 headers | Patrick Georgi |
2015-05-28 | smm: Merge configs SMM_MODULES and SMM_TSEG | Vladimir Serbinenko |
2015-05-28 | Migrate 206ax to SMM_MODULES | Vladimir Serbinenko |
2015-05-28 | intel: Remove pstate_coord_type. | Vladimir Serbinenko |
2015-05-26 | acpigen: Remove all explicit length tracking | Vladimir Serbinenko |
2015-05-21 | Remove address from GPLv2 headers | Patrick Georgi |
2015-05-13 | Include back the 306ax microcode again. | Vladimir Serbinenko |
2015-05-05 | 3rdparty: move to 3rdparty/blobs | Patrick Georgi |
2015-05-05 | 3rdparty: Move to blobs | Patrick Georgi |
2015-02-28 | cpu/intel: (non-FSP) Remove microcode updates from tree | Alexandru Gagniuc |
2015-02-28 | cpu/intel (non-FSP): Use microcode from blobs repository | Alexandru Gagniuc |
2015-02-16 | acpi: Generate valid ACPI processor objects | Timothy Pearson |
2015-02-11 | cpu/intel: >= nehalem: add comments to msr finalize's | Alexander Couzens |
2015-01-27 | vboot2: add verstage | Stefan Reinauer |
2015-01-03 | intel/model_206ax: update microcode | Nicolas Reinecke |
2014-12-02 | Replace hlt with halt() | Patrick Georgi |
2014-11-19 | acpigen: Add and use acpigen_write_method. | Vladimir Serbinenko |
2014-11-09 | ibexpeak, bd82x6x: Move to implicit length patching | Vladimir Serbinenko |
2014-10-27 | {arch,cpu,drivers,ec}: Don't hide pointers behind typedefs | Edward O'Callaghan |
2014-10-19 | x86 romstage: Move stack just below RAMTOP | Kyösti Mälkki |
2014-10-16 | ACPI: Remove CONFIG_GENERATE_ACPI_TABLES | Vladimir Serbinenko |
2014-08-12 | cpu/intel/XXX/acpi.c: Fix coding style violation | Martin Roth |
2014-08-04 | cpu/intel: Fix out-of-bounds read due to off-by-one in condition | Edward O'Callaghan |
2014-07-08 | cpu: Trivial - drop trailing blank lines at EOF | Edward O'Callaghan |
2014-07-05 | intel: Make monotonic timer a first class citizen | Edward O'Callaghan |
2014-05-10 | Replace SERIAL_CPU_INIT with PARALLEL_CPU_INIT | Kyösti Mälkki |
2014-05-06 | Introduce stage-specific architecture for coreboot | Furquan Shaikh |
2014-05-03 | Move ARCH_* from board/Kconfig to cpu or soc Kconfig. | Furquan Shaikh |
2014-04-26 | Rename coreboot_ram stage to ramstage | Furquan Shaikh |
2014-02-12 | PCI: Drop includes under cpu | Kyösti Mälkki |
2014-01-23 | intel/microcode: Remove leftover MICROCODE_INCLUDE_PATH. | Vladimir Serbinenko |
2014-01-16 | cpu/intel: Remove dummy terminators from microcode blobs | Alexandru Gagniuc |
2014-01-15 | nehalem/sandy/ivy/haswell: Enable WRPROT cache for all of flash | Kyösti Mälkki |
2014-01-15 | Re-declare CACHE_ROM_SIZE as aligned ROM_SIZE for MTRR | Kyösti Mälkki |
2013-12-13 | cpu: Rename CPU_MICROCODE_IN_CBFS to SUPPORT_CPU_UCODE_IN_CBFS | Alexandru Gagniuc |
2013-07-11 | cpu: Fix spelling | Martin Roth |
2013-07-11 | usbdebug: Drop old includes | Kyösti Mälkki |
2013-07-10 | usbdebug: Put ehci_debug_info in CAR_GLOBAL | Kyösti Mälkki |
2013-06-14 | usbdebug: Drop temporary disables of log output | Kyösti Mälkki |
2013-05-10 | Drop prototype guarding for romcc | Stefan Reinauer |
2013-05-08 | copy_and_run: drop boot_complete parameter | Stefan Reinauer |
2013-03-22 | x86: Unify arch/io.h and arch/romcc_io.h | Stefan Reinauer |
2013-03-20 | Intel: Update CPU microcode for Sandybridge/Ivybridge CPUs | Stefan Reinauer |
2013-03-01 | GPLv2 notice: Unify all files to just use one space in »MA 02110-1301« | Paul Menzel |
2013-02-09 | speedstep: Deduplicate some MSR identifiers | Patrick Georgi |
2013-02-09 | document Intel VMX locking behavior | Mike Frysinger |
2012-11-27 | Get rid of drivers class | Patrick Georgi |
2012-11-13 | Fix CONFIG_MAX_CPU set to 1 CPU build problem | Stefan Reinauer |
2012-11-12 | ivybridge: Catch unknown CPU revisions | Stefan Reinauer |
2012-11-12 | Initialize the VMX MSR | Marc Jones |
2012-11-12 | Revert "Remove code that enables/disables VMX in coreboot on chromebooks." | Marc Jones |
2012-11-12 | sandybridge: Correct reporting of cores and threads | Stefan Reinauer |
2012-11-07 | Leave power control registers unlocked | Sameer Nanda |
2012-11-01 | Merge cpu/intel/acpi.h into cpu/intel/speedstep.h | Nico Huber |
2012-09-05 | buildsystem: Make CPU microcode updating more configurable | Alexandru Gagniuc |
2012-08-22 | Auto-declare chip_operations | Kyösti Mälkki |
2012-08-09 | Synchronize rdtsc instructions | Stefan Reinauer |
2012-07-31 | Revert "Use broadcast SIPI to startup siblings" | Sven Schnelle |
2012-07-31 | Revert "remove CONFIG_SERIAL_CPU_INIT" | Sven Schnelle |
2012-07-26 | CPU: Add option to set TCC activation offset | Duncan Laurie |
2012-07-26 | ACPI: Add a method to notify OS to re-read _PPC | Duncan Laurie |
2012-07-26 | ACPI: Add function to write _PPC using NVS | Duncan Laurie |
2012-07-26 | Drop CONFIG_CPU_MODEL_NAME and fix CPU name displayed in logs | Stefan Reinauer |
2012-07-26 | Enable Microcode in CBFS for all SandyBridge/IvyBridge systems | Stefan Reinauer |
2012-07-25 | Fix comment to reference IvyBridge, too | Stefan Reinauer |
2012-07-25 | Include SandyBridge Microcode when IvyBridge is enabled | Stefan Reinauer |
2012-07-24 | CPU: Set flex ratio to nominal TDP ratio in bootblock | Duncan Laurie |
2012-07-24 | CPU: Update ivybridge PP1 current limit value | Duncan Laurie |
2012-07-24 | CPU: Add basic support for Nominal Configurable TDP | Duncan Laurie |
2012-07-24 | Config changes to support microcode in CBFS | Vadim Bendebury |
2012-07-24 | Add code to read Intel microcode from CBFS | Vadim Bendebury |
2012-07-24 | Rename microcode include file to be model agnostic | Vadim Bendebury |