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Age
Commit message (
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Author
2014-05-10
Replace SERIAL_CPU_INIT with PARALLEL_CPU_INIT
Kyösti Mälkki
2014-05-06
Introduce stage-specific architecture for coreboot
Furquan Shaikh
2014-05-03
Move ARCH_* from board/Kconfig to cpu or soc Kconfig.
Furquan Shaikh
2014-04-26
Rename coreboot_ram stage to ramstage
Furquan Shaikh
2014-02-12
PCI: Drop includes under cpu
Kyösti Mälkki
2014-01-23
intel/microcode: Remove leftover MICROCODE_INCLUDE_PATH.
Vladimir Serbinenko
2014-01-16
cpu/intel: Remove dummy terminators from microcode blobs
Alexandru Gagniuc
2014-01-15
nehalem/sandy/ivy/haswell: Enable WRPROT cache for all of flash
Kyösti Mälkki
2014-01-15
Re-declare CACHE_ROM_SIZE as aligned ROM_SIZE for MTRR
Kyösti Mälkki
2013-12-13
cpu: Rename CPU_MICROCODE_IN_CBFS to SUPPORT_CPU_UCODE_IN_CBFS
Alexandru Gagniuc
2013-07-11
cpu: Fix spelling
Martin Roth
2013-07-11
usbdebug: Drop old includes
Kyösti Mälkki
2013-07-10
usbdebug: Put ehci_debug_info in CAR_GLOBAL
Kyösti Mälkki
2013-06-14
usbdebug: Drop temporary disables of log output
Kyösti Mälkki
2013-05-10
Drop prototype guarding for romcc
Stefan Reinauer
2013-05-08
copy_and_run: drop boot_complete parameter
Stefan Reinauer
2013-03-22
x86: Unify arch/io.h and arch/romcc_io.h
Stefan Reinauer
2013-03-20
Intel: Update CPU microcode for Sandybridge/Ivybridge CPUs
Stefan Reinauer
2013-03-01
GPLv2 notice: Unify all files to just use one space in »MA 02110-1301«
Paul Menzel
2013-02-09
speedstep: Deduplicate some MSR identifiers
Patrick Georgi
2013-02-09
document Intel VMX locking behavior
Mike Frysinger
2012-11-27
Get rid of drivers class
Patrick Georgi
2012-11-13
Fix CONFIG_MAX_CPU set to 1 CPU build problem
Stefan Reinauer
2012-11-12
ivybridge: Catch unknown CPU revisions
Stefan Reinauer
2012-11-12
Initialize the VMX MSR
Marc Jones
2012-11-12
Revert "Remove code that enables/disables VMX in coreboot on chromebooks."
Marc Jones
2012-11-12
sandybridge: Correct reporting of cores and threads
Stefan Reinauer
2012-11-07
Leave power control registers unlocked
Sameer Nanda
2012-11-01
Merge cpu/intel/acpi.h into cpu/intel/speedstep.h
Nico Huber
2012-09-05
buildsystem: Make CPU microcode updating more configurable
Alexandru Gagniuc
2012-08-22
Auto-declare chip_operations
Kyösti Mälkki
2012-08-09
Synchronize rdtsc instructions
Stefan Reinauer
2012-07-31
Revert "Use broadcast SIPI to startup siblings"
Sven Schnelle
2012-07-31
Revert "remove CONFIG_SERIAL_CPU_INIT"
Sven Schnelle
2012-07-26
CPU: Add option to set TCC activation offset
Duncan Laurie
2012-07-26
ACPI: Add a method to notify OS to re-read _PPC
Duncan Laurie
2012-07-26
ACPI: Add function to write _PPC using NVS
Duncan Laurie
2012-07-26
Drop CONFIG_CPU_MODEL_NAME and fix CPU name displayed in logs
Stefan Reinauer
2012-07-26
Enable Microcode in CBFS for all SandyBridge/IvyBridge systems
Stefan Reinauer
2012-07-25
Fix comment to reference IvyBridge, too
Stefan Reinauer
2012-07-25
Include SandyBridge Microcode when IvyBridge is enabled
Stefan Reinauer
2012-07-24
CPU: Set flex ratio to nominal TDP ratio in bootblock
Duncan Laurie
2012-07-24
CPU: Update ivybridge PP1 current limit value
Duncan Laurie
2012-07-24
CPU: Add basic support for Nominal Configurable TDP
Duncan Laurie
2012-07-24
Config changes to support microcode in CBFS
Vadim Bendebury
2012-07-24
Add code to read Intel microcode from CBFS
Vadim Bendebury
2012-07-24
Rename microcode include file to be model agnostic
Vadim Bendebury
2012-07-24
Properly identify ACPI C3 states in _CST table.
Duncan Laurie
2012-07-24
Remove code that enables/disables VMX in coreboot on chromebooks.
Ronald G. Minnich
2012-07-04
Intel cpus: Extend cache to cover complete Flash Device
Kyösti Mälkki
2012-07-04
Intel cpus: use CPU_ADDR_BITS from Kconfig during CAR
Kyösti Mälkki
2012-07-02
remove CONFIG_SERIAL_CPU_INIT
Sven Schnelle
2012-07-02
Use broadcast SIPI to startup siblings
Sven Schnelle
2012-05-29
Drop config variable CPU_MODEL_INDEX
Stefan Reinauer
2012-04-30
Fix up Sandybridge C state generation code
Stefan Reinauer
2012-04-26
Revamp Intel microcode update code
Stefan Reinauer
2012-04-25
Replace cache control magic numbers with symbols
Patrick Georgi
2012-04-05
Add support for Intel Sandybridge CPU
Stefan Reinauer