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path: root/src/cpu/intel/model_2065x
AgeCommit message (Expand)Author
2015-02-18cpu/intel/model_2065x|nehalem: remove unsupported MSR_PP0/MSR_PP1Alexander Couzens
2015-02-11cpu/intel: >= nehalem: add comments to msr finalize'sAlexander Couzens
2015-01-31intel/model_2065x: update microcodeNicolas Reinecke
2015-01-27vboot2: add verstageStefan Reinauer
2014-12-02Replace hlt with halt()Patrick Georgi
2014-11-19acpigen: Add and use acpigen_write_method.Vladimir Serbinenko
2014-11-09ibexpeak, bd82x6x: Move to implicit length patchingVladimir Serbinenko
2014-10-27{arch,cpu,drivers,ec}: Don't hide pointers behind typedefsEdward O'Callaghan
2014-10-19x86 romstage: Move stack just below RAMTOPKyösti Mälkki
2014-10-16ACPI: Remove CONFIG_GENERATE_ACPI_TABLESVladimir Serbinenko
2014-08-12cpu/intel/XXX/acpi.c: Fix coding style violationMartin Roth
2014-07-30cpu/intel/model_2065x/model_2065x_init.c: Remove dead codeEdward O'Callaghan
2014-07-19intel/model_2065x: Remove dead code.Vladimir Serbinenko
2014-07-08cpu: Trivial - drop trailing blank lines at EOFEdward O'Callaghan
2014-07-05intel: Make monotonic timer a first class citizenEdward O'Callaghan
2014-06-17intel/model_2065x: Add 20652 microcode.Vladimir Serbinenko
2014-05-10Replace SERIAL_CPU_INIT with PARALLEL_CPU_INITKyösti Mälkki
2014-05-06Introduce stage-specific architecture for corebootFurquan Shaikh
2014-05-03Move ARCH_* from board/Kconfig to cpu or soc Kconfig.Furquan Shaikh
2014-04-26Rename coreboot_ram stage to ramstageFurquan Shaikh
2014-04-26Get rid of HAVE_INIT_TIMER config optionFurquan Shaikh
2014-02-20intel/model_2065x: Fix APICID generation.Vladimir Serbinenko
2014-02-12PCI: Drop includes under cpuKyösti Mälkki
2014-02-01cpu/intel/model_2065x: Add model 20652Vladimir Serbinenko
2014-01-23intel/microcode: Remove leftover MICROCODE_INCLUDE_PATH.Vladimir Serbinenko
2014-01-16cpu/intel: Remove dummy terminators from microcode blobsAlexandru Gagniuc
2014-01-15nehalem/sandy/ivy/haswell: Enable WRPROT cache for all of flashKyösti Mälkki
2014-01-15Re-declare CACHE_ROM_SIZE as aligned ROM_SIZE for MTRRKyösti Mälkki
2013-12-13cpu: Rename CPU_MICROCODE_IN_CBFS to SUPPORT_CPU_UCODE_IN_CBFSAlexandru Gagniuc
2013-11-23Rename SANDYBRIDGE_BCLK to NEHALEM_BCLK in 2065x.Vladimir Serbinenko
2013-11-23Remove MRC variables from 2065x CAR init.Vladimir Serbinenko
2013-11-21Fix error message on wrong compiles of 2065xVladimir Serbinenko
2013-11-13intel/2065x: Use TSC for udelay()Vladimir Serbinenko
2013-07-11cpu: Fix spellingMartin Roth
2013-07-11usbdebug: Drop old includesKyösti Mälkki
2013-07-10usbdebug: Put ehci_debug_info in CAR_GLOBALKyösti Mälkki
2013-06-14usbdebug: Drop temporary disables of log outputKyösti Mälkki
2013-06-13Add support for Intel Nehalem CPUVladimir Serbinenko
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