| Age | Commit message (Expand) | Author |
|---|---|---|
| 2014-10-19 | x86 romstage: Move stack just below RAMTOP | Kyösti Mälkki |
| 2014-07-19 | intel/model_2065x: Remove dead code. | Vladimir Serbinenko |
| 2014-04-26 | Rename coreboot_ram stage to ramstage | Furquan Shaikh |
| 2014-01-15 | Re-declare CACHE_ROM_SIZE as aligned ROM_SIZE for MTRR | Kyösti Mälkki |
| 2013-11-23 | Remove MRC variables from 2065x CAR init. | Vladimir Serbinenko |
| 2013-07-10 | usbdebug: Put ehci_debug_info in CAR_GLOBAL | Kyösti Mälkki |
| 2013-06-13 | Add support for Intel Nehalem CPU | Vladimir Serbinenko |
 |
index : coreboot.git | |
| my copy of coreboot | gitea |
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