coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2024-02-08	cpu/x86/64bit: Turn jumping to long mode into a macro	Arthur Heymans
2023-09-14	x86: Add .data section support for pre-memory stages	Jeremy Compostella
2023-08-05	src/*/post_code.h: Change post code prefix to POSTCODE	Yuchen He
2023-06-23	commonlib/console/post_code.h: Change post code prefix to POSTCODE	lilacious
2022-12-17	Add option to use Ada code in romstage	Jeremy Compostella
2022-12-16	cpu/intel: Fix clearing MTRR for clang 64bit	Arthur Heymans
2022-11-23	cpu/intel/car: Define post codes	Martin Roth
2022-11-22	src/cpu: Remove unnecessary space after casts	Elyes Haouas
2022-10-26	cpu/intel: Clean up includes	Elyes Haouas
2022-10-06	cpu/intel/car/romstage.c: Clean up includes and add <types.h>	Elyes Haouas
2022-07-14	arch/x86: Mark prepare_and_run_postcar noreturn	Arthur Heymans
2022-06-07	arch/x86: Add a common romstage entry	Arthur Heymans
2022-05-16	arch/x86/postcar_loader.c: Change prepare_and_run_postcar signature	Arthur Heymans
2022-03-08	timestamps: Rename timestamps to make names more consistent	Jakub Czapiga
2021-07-07	cpu/intel/car/core2/cache_as_ram: Add x86_64 support	Patrick Rudolph
2021-07-06	cpu/intel/car/p4: Add x86_64 support	Arthur Heymans
2021-07-05	cpu/intel/car/p4-netburst: Prepare for x86_64	Arthur Heymans
2021-06-01	cpu/intel/car/romstage.c: Drop unused function argument	Arthur Heymans
2021-01-07	arch/x86: Move prologue to .init section	Kyösti Mälkki
2020-11-02	cpu/intel/car/non-evict/cache_as_ram.S: Add support for longmode	Patrick Rudolph
2020-07-26	cpu/intel/car/romstage.c: Remove unused <bootblock_common.h>	Elyes HAOUAS
2020-06-15	cpu/intel: Remove obsolete comment in CAR setup	Kyösti Mälkki
2020-06-13	cpu/intel/car: Use symbols for CAR MTRR setup	Kyösti Mälkki
2020-06-06	src: Remove unused 'include <cpu/x86/mtrr.h>'	Elyes HAOUAS
2020-05-11	treewide: Remove "this file is part of" lines	Patrick Georgi
2020-04-04	src/cpu: Use SPDX for GPL-2.0-only files	Angel Pons
2019-12-17	cpu/intel: Remove ROMCC header guards and code	Elyes HAOUAS
2019-12-14	bootblock: Provide some common prototypes	Kyösti Mälkki
2019-11-25	cpu/intel/slot_1: Move to C_ENVIRONMENT_BOOTBLOCK	Arthur Heymans
2019-11-25	Kconfig: Drop the C_ENVIRONMENT_BOOTBLOCK symbol	Arthur Heymans
2019-11-20	cpu/intel/car: Add EC software sync to Intel romstage	Tim Wawrzynczak
2019-11-15	nb/intel/i945: Move to C_ENVIRONMENT_BOOTBLOCK	Arthur Heymans
2019-11-12	arch/x86/car.ld: Rename suffix _start/_end	Arthur Heymans
2019-11-04	cpu/intel/car/p4-netburst: Remove delay loops	Kyösti Mälkki
2019-10-28	cpu/intel/car: Correctly cache the bootblock with C_ENVIRONMENT_BOOTBLOCK	Arthur Heymans
2019-09-10	AUTHORS: Move src/cpu/intel copyrights into AUTHORS file	Martin Roth
2019-08-26	intel/car: Use common TS_START_ROMSTAGE	Kyösti Mälkki
2019-08-26	lib/bootblock: Add simplified entry with basetime	Kyösti Mälkki
2019-08-26	soc/intel: Use common romstage code	Kyösti Mälkki
2019-08-22	arch/x86: Add <arch/romstage.h>	Kyösti Mälkki
2019-08-21	cpu/intel/car: Make stack guards more useful on C_ENV_BOOTBLOCK	Arthur Heymans
2019-08-18	cpu/intel: Enter romstage without BIST	Kyösti Mälkki
2019-08-15	cpu/x86/smm: Promote smm_memory_map()	Kyösti Mälkki
2019-08-15	arch/x86: Add postcar_frame_common_mtrrs()	Kyösti Mälkki
2019-08-15	cpu/intel: Refactor platform_enter_postcar()	Kyösti Mälkki
2019-06-21	cpu: Add missing #include <commonlib/helpers.h>	Elyes HAOUAS
2019-04-21	cpu/intel/haswell: Use C_ENVIRONMENT_BOOTBLOCK	Arthur Heymans
2019-03-08	coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX)	Julius Werner
2019-02-10	cpu/intel/car/*/cache_as_ram.S: Add brackets around operand	Arthur Heymans
2019-01-17	cpu/intel/car: Remove unneeded white space	Elyes HAOUAS
2019-01-15	cpu/intel/socket_FCBGA559: Use the non-evict cache as ram setup	Arthur Heymans
2019-01-14	cpu/intel/car/non-evict: Update microcode in CAR setup	Arthur Heymans
2019-01-13	arch/x86: Drop Kconfig AP_SIPI_VECTOR	Kyösti Mälkki
2019-01-13	cpu/intel/car/p4: Update microcode in CAR setup	Arthur Heymans
2019-01-09	cpu/intel: Use the common code to initialize the romstage timestamps	Arthur Heymans
2019-01-08	cpu/intel/car/bootblock.c: Report BIST failures	Arthur Heymans
2019-01-08	cpu/intel/car: Enable use of C_ENVIRONMENT_BOOTBLOCK	Arthur Heymans
2019-01-08	cpu/intel/car: Prepare for C_ENVIRONMENT_BOOTBLOCK	Kyösti Mälkki
2018-12-30	arch/x86: Add CAR stack location symbols	Kyösti Mälkki
2018-12-30	cpu/intel/car: Drop remains of setup_stack_and_mtrrs()	Kyösti Mälkki
2018-12-28	soc/intel: Drop romstage_after_car()	Kyösti Mälkki
2018-12-24	car/non-evict/exit_car.S: Use tabs instead of white spaces	Elyes HAOUAS
2018-12-21	car/non-evict/cache_as_ram.S: Use tabs instead of spaces	Arthur Heymans
2018-11-12	src: Remove unneeded include "{arch,cpu}/cpu.h"	Elyes HAOUAS
2018-10-04	cpu/intel/car: Fix typo	Elyes HAOUAS
2018-09-18	cpu/*/car: fix ancient URL explaining XIP range run-time calculation	Stefan Tauner
2018-08-13	cpu/intel/car: Align the stack to 16 bytes before romstage_main	Arthur Heymans
2018-06-27	cpu/intel/p4-netburst: skip caching rom on model_fxx	Arthur Heymans
2018-06-27	x86/car: Replace reference of copy_and_run location	Kyösti Mälkki
2018-06-17	nb/intel/i440bx: Switch to POSTCAR_STAGE	Kyösti Mälkki
2018-06-17	cpu/intel/car/p3: Use variable MTRR count	Kyösti Mälkki
2018-06-17	cpu/intel/slot_1: Switch to different CAR setup	Kyösti Mälkki
2018-06-17	cpu/intel/car: Remove obsolete files	Kyösti Mälkki
2018-06-05	cpu/intel/car/non-evict: Improve a few things	Arthur Heymans
2018-06-05	cpu/intel/car/non-evict: Prepare for some POSTCAR_STAGE support	Arthur Heymans
2018-06-05	cpu/intel/car/core2: Improve a few things	Arthur Heymans
2018-06-05	cpu/intel/car/core2: Prepare for POSTCAR_STAGE support	Arthur Heymans
2018-06-02	cpu/intel/car: Prepare for some POSTCAR_STAGE support	Kyösti Mälkki
2018-06-02	aopen/dxplplusu intel/e7505: Move to EARLY_CBMEM_INIT	Kyösti Mälkki
2018-05-31	{cpu,drivers,nb,soc}/intel: Use CACHE_ROM_BASE where appropriate	Nico Huber
2017-09-12	cpu/intel/car/cache_as_ram.inc: Fix long standing issues	Keith Hui
2017-09-12	cpu/intel/car/cache_as_ram.inc: Remove unused code	Keith Hui
2017-09-12	cpu/intel/car/cache_as_ram.inc: Remove broken HT code	Keith Hui
2017-09-08	intel/car: Fix stack guard placement	Kyösti Mälkki
2017-06-28	cpu/*: Add whitespace around '<<'	Elyes HAOUAS
2017-06-07	Use more secure HTTPS URLs for coreboot sites	Paul Menzel
2017-03-16	cpu/intel: Fix the spacing issues	Lee Leahy
2017-03-16	cpu/intel: Indent with tabs	Lee Leahy
2016-12-11	intel i945 gm45 x4x post-car: Use postcar_frame for MTRR setup	Kyösti Mälkki
2016-11-20	intel car: Move pre-ram stack guard lower	Kyösti Mälkki
2016-11-11	intel cache-as-ram: Unify stack setup	Kyösti Mälkki
2016-11-11	intel post-car: Separate files for setup_stack_and_mtrrs()	Kyösti Mälkki
2016-11-08	intel post-car: Split legacy sockets	Kyösti Mälkki
2016-09-04	src/cpu: Improve code formatting	Elyes HAOUAS
2016-08-23	src/cpu: Capitalize CPU, APIC and IOAPIC typo fix	Elyes HAOUAS
2016-07-26	intel car: Use MTRR WRPROT type for XIP cache	Kyösti Mälkki
2016-07-22	intel car: Unify postcodes	Kyösti Mälkki
2016-07-22	intel car: Unify whitespace and comment fixes	Kyösti Mälkki
2016-07-22	intel car: Remove guard on XIP_ROM_SIZE	Kyösti Mälkki
2016-06-22	Ignore RAMTOP for MTRRs	Kyösti Mälkki