index
:
coreboot.git
macbookair5_2
macbookpro10_1
main
master
mbp101_medisable
mbp101_medisable_1
mbp82
x230
my copy of coreboot
gitea
about
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
src
/
cpu
/
intel
/
car
Age
Commit message (
Expand
)
Author
2019-11-04
cpu/intel/car/p4-netburst: Remove delay loops
Kyösti Mälkki
2019-10-28
cpu/intel/car: Correctly cache the bootblock with C_ENVIRONMENT_BOOTBLOCK
Arthur Heymans
2019-09-10
AUTHORS: Move src/cpu/intel copyrights into AUTHORS file
Martin Roth
2019-08-26
intel/car: Use common TS_START_ROMSTAGE
Kyösti Mälkki
2019-08-26
lib/bootblock: Add simplified entry with basetime
Kyösti Mälkki
2019-08-26
soc/intel: Use common romstage code
Kyösti Mälkki
2019-08-22
arch/x86: Add <arch/romstage.h>
Kyösti Mälkki
2019-08-21
cpu/intel/car: Make stack guards more useful on C_ENV_BOOTBLOCK
Arthur Heymans
2019-08-18
cpu/intel: Enter romstage without BIST
Kyösti Mälkki
2019-08-15
cpu/x86/smm: Promote smm_memory_map()
Kyösti Mälkki
2019-08-15
arch/x86: Add postcar_frame_common_mtrrs()
Kyösti Mälkki
2019-08-15
cpu/intel: Refactor platform_enter_postcar()
Kyösti Mälkki
2019-06-21
cpu: Add missing #include <commonlib/helpers.h>
Elyes HAOUAS
2019-04-21
cpu/intel/haswell: Use C_ENVIRONMENT_BOOTBLOCK
Arthur Heymans
2019-03-08
coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX)
Julius Werner
2019-02-10
cpu/intel/car/*/cache_as_ram.S: Add brackets around operand
Arthur Heymans
2019-01-17
cpu/intel/car: Remove unneeded white space
Elyes HAOUAS
2019-01-15
cpu/intel/socket_FCBGA559: Use the non-evict cache as ram setup
Arthur Heymans
2019-01-14
cpu/intel/car/non-evict: Update microcode in CAR setup
Arthur Heymans
2019-01-13
arch/x86: Drop Kconfig AP_SIPI_VECTOR
Kyösti Mälkki
2019-01-13
cpu/intel/car/p4: Update microcode in CAR setup
Arthur Heymans
2019-01-09
cpu/intel: Use the common code to initialize the romstage timestamps
Arthur Heymans
2019-01-08
cpu/intel/car/bootblock.c: Report BIST failures
Arthur Heymans
2019-01-08
cpu/intel/car: Enable use of C_ENVIRONMENT_BOOTBLOCK
Arthur Heymans
2019-01-08
cpu/intel/car: Prepare for C_ENVIRONMENT_BOOTBLOCK
Kyösti Mälkki
2018-12-30
arch/x86: Add CAR stack location symbols
Kyösti Mälkki
2018-12-30
cpu/intel/car: Drop remains of setup_stack_and_mtrrs()
Kyösti Mälkki
2018-12-28
soc/intel: Drop romstage_after_car()
Kyösti Mälkki
2018-12-24
car/non-evict/exit_car.S: Use tabs instead of white spaces
Elyes HAOUAS
2018-12-21
car/non-evict/cache_as_ram.S: Use tabs instead of spaces
Arthur Heymans
2018-11-12
src: Remove unneeded include "{arch,cpu}/cpu.h"
Elyes HAOUAS
2018-10-04
cpu/intel/car: Fix typo
Elyes HAOUAS
2018-09-18
cpu/*/car: fix ancient URL explaining XIP range run-time calculation
Stefan Tauner
2018-08-13
cpu/intel/car: Align the stack to 16 bytes before romstage_main
Arthur Heymans
2018-06-27
cpu/intel/p4-netburst: skip caching rom on model_fxx
Arthur Heymans
2018-06-27
x86/car: Replace reference of copy_and_run location
Kyösti Mälkki
2018-06-17
nb/intel/i440bx: Switch to POSTCAR_STAGE
Kyösti Mälkki
2018-06-17
cpu/intel/car/p3: Use variable MTRR count
Kyösti Mälkki
2018-06-17
cpu/intel/slot_1: Switch to different CAR setup
Kyösti Mälkki
2018-06-17
cpu/intel/car: Remove obsolete files
Kyösti Mälkki
2018-06-05
cpu/intel/car/non-evict: Improve a few things
Arthur Heymans
2018-06-05
cpu/intel/car/non-evict: Prepare for some POSTCAR_STAGE support
Arthur Heymans
2018-06-05
cpu/intel/car/core2: Improve a few things
Arthur Heymans
2018-06-05
cpu/intel/car/core2: Prepare for POSTCAR_STAGE support
Arthur Heymans
2018-06-02
cpu/intel/car: Prepare for some POSTCAR_STAGE support
Kyösti Mälkki
2018-06-02
aopen/dxplplusu intel/e7505: Move to EARLY_CBMEM_INIT
Kyösti Mälkki
2018-05-31
{cpu,drivers,nb,soc}/intel: Use CACHE_ROM_BASE where appropriate
Nico Huber
2017-09-12
cpu/intel/car/cache_as_ram.inc: Fix long standing issues
Keith Hui
2017-09-12
cpu/intel/car/cache_as_ram.inc: Remove unused code
Keith Hui
2017-09-12
cpu/intel/car/cache_as_ram.inc: Remove broken HT code
Keith Hui
2017-09-08
intel/car: Fix stack guard placement
Kyösti Mälkki
2017-06-28
cpu/*: Add whitespace around '<<'
Elyes HAOUAS
2017-06-07
Use more secure HTTPS URLs for coreboot sites
Paul Menzel
2017-03-16
cpu/intel: Fix the spacing issues
Lee Leahy
2017-03-16
cpu/intel: Indent with tabs
Lee Leahy
2016-12-11
intel i945 gm45 x4x post-car: Use postcar_frame for MTRR setup
Kyösti Mälkki
2016-11-20
intel car: Move pre-ram stack guard lower
Kyösti Mälkki
2016-11-11
intel cache-as-ram: Unify stack setup
Kyösti Mälkki
2016-11-11
intel post-car: Separate files for setup_stack_and_mtrrs()
Kyösti Mälkki
2016-11-08
intel post-car: Split legacy sockets
Kyösti Mälkki
2016-09-04
src/cpu: Improve code formatting
Elyes HAOUAS
2016-08-23
src/cpu: Capitalize CPU, APIC and IOAPIC typo fix
Elyes HAOUAS
2016-07-26
intel car: Use MTRR WRPROT type for XIP cache
Kyösti Mälkki
2016-07-22
intel car: Unify postcodes
Kyösti Mälkki
2016-07-22
intel car: Unify whitespace and comment fixes
Kyösti Mälkki
2016-07-22
intel car: Remove guard on XIP_ROM_SIZE
Kyösti Mälkki
2016-06-22
Ignore RAMTOP for MTRRs
Kyösti Mälkki
2016-06-22
intel cache-as-ram: Fix comment about MTRRs
Kyösti Mälkki
2016-06-21
intel/car/cache_as_ram_ht.inc: Prepare for dynamic CONFIG_RAMTOP
Kyösti Mälkki
2016-06-21
intel/car/cache_as_ram.inc: Prepare for dynamic CONFIG_RAMTOP
Kyösti Mälkki
2016-06-18
intel: Fix romstage main() with asmlinkage
Kyösti Mälkki
2015-10-31
tree: drop last paragraph of GPL copyright header
Patrick Georgi
2015-10-15
cpu/mtrr.h: Fix macro names for MTRR registers
Alexandru Gagniuc
2015-07-07
x86: Drop -Wa,--divide
Stefan Reinauer
2015-06-08
Remove empty lines at end of file
Elyes HAOUAS
2015-05-21
Remove address from GPLv2 headers
Patrick Georgi
2014-10-19
x86 romstage: Move stack just below RAMTOP
Kyösti Mälkki
2014-01-15
Re-declare CACHE_ROM_SIZE as aligned ROM_SIZE for MTRR
Kyösti Mälkki
2013-07-10
usbdebug: Put ehci_debug_info in CAR_GLOBAL
Kyösti Mälkki
2013-05-08
copy_and_run: drop boot_complete parameter
Stefan Reinauer
2013-03-01
GPLv2 notice: Unify all files to just use one space in »MA 02110-1301«
Paul Menzel
2012-08-03
Intel CPUs: Fix counting of CPU cores
Kyösti Mälkki
2012-07-04
Intel cpus: Extend cache to cover complete Flash Device
Kyösti Mälkki
2012-04-25
Replace cache control magic numbers with symbols
Patrick Georgi
2012-03-31
Whitespace fixes
Patrick Georgi
2012-03-31
Intel cpus: get MAXPHYADDR at runtime for new CAR
Kyösti Mälkki
2012-03-31
Intel cpus: add hyper-threading CPU support to new CAR
Kyösti Mälkki
2012-03-31
Intel cpus: improve CPU compatibility of new CAR
Kyösti Mälkki
2012-03-31
Intel cpus: apply some good programming practices in new CAR
Kyösti Mälkki
2012-03-31
Intel cpus: cache actual size of the Flash ROM device
Kyösti Mälkki
2012-03-31
Intel cpus: copy model_6ex CAR code
Kyösti Mälkki
2011-11-01
Remove XIP_ROM_BASE
Patrick Georgi
2011-10-30
Fix slow CAR execution introduced by 7c7d87182feb78cb2bc02fb3558bef56a41682c9
Rudolf Marek
2011-10-28
Get rid of AUTO_XIP_ROM_BASE
Patrick Georgi
2011-04-21
more ifdef -> if fixes
Stefan Reinauer
2011-04-14
Use symbolic names for some MTRR bits instead of numbers in CAR code
Stefan Reinauer
2011-04-11
Unify use of post_code
Alexandru Gagniuc
2011-01-19
Revert r5902 to make code more readable again. At least three people like to
Stefan Reinauer
2010-12-08
These empty files sneaked in from another patch and shouldn't have been inclu...
Tobias Diedrich
2010-12-08
Tobias Diedrich wrote:
Tobias Diedrich
[next]