Age | Commit message (Expand) | Author |
2013-02-11 | AMD S3: Change the hardcoded data size to macros. | Zheng Bao |
2013-01-25 | AGESA: Kconfig: Drop useless depends statement | Patrick Georgi |
2013-01-11 | AMD: Set the mask of MTRR according to CONFIG_CPU_ADDR_BITS | Zheng Bao |
2012-12-12 | Claim the SPI bus before writes if the IMC ROM is present | Martin Roth |
2012-11-30 | AMD S3: Leverage the public SPI routine | Zheng Bao |
2012-11-28 | Remove assembly coded log2 function | Ronald G. Minnich |
2012-11-28 | amdk8/amdfam10: Use CAR_GLOBAL for sysinfo | Patrick Georgi |
2012-11-27 | Remove AMD special case for LAPIC based udelay() | Patrick Georgi |
2012-11-27 | Get rid of drivers class | Patrick Georgi |
2012-11-20 | Unify use of bool config variables | Stefan Reinauer |
2012-11-20 | Make sure only one udelay function is available | Stefan Reinauer |
2012-11-16 | Clean up Kconfig | Stefan Reinauer |
2012-11-02 | AMD agesa: add enable cache at the end of disable_cache_as_ram | Siyuan Wang |
2012-10-07 | Remove chip.h files without config structure | Kyösti Mälkki |
2012-09-19 | C32 legacy code: change CONFIG_CPU_AMD_SOCKET_C32 to CONFIG_CPU_AMD_SOCKET_C3... | Siyuan Wang |
2012-08-22 | Auto-declare chip_operations | Kyösti Mälkki |
2012-08-09 | Replicate TOP_MEM and TOP_MEM2 from BSP to AP CPU | Kyösti Mälkki |
2012-08-09 | AMD northbridge: copy TOP_MEM and TOP_MEM2 for distribution | Kyösti Mälkki |
2012-08-09 | Synchronize rdtsc instructions | Stefan Reinauer |
2012-08-05 | AMD S3: Remove the hardcoded volatile position | zbao |
2012-08-04 | Make the device tree available in the rom stage | Stefan Reinauer |
2012-07-22 | AMD CPUs: Updated CPU list in powernow_acpi.c | Jukka Rantala |
2012-07-18 | AMD northbridges: drop dead code | Kyösti Mälkki |
2012-07-16 | AMD: Fix GFXUMA with 4GB or more RAM | Kyösti Mälkki |
2012-07-16 | AMD MTRR: fix rounding and renames | Kyösti Mälkki |
2012-07-16 | Define global uma_memory variables | Kyösti Mälkki |
2012-07-14 | Remove useless file from building. | zbao |
2012-07-03 | AGESA F15 wrapper for Trinity | zbao |
2012-05-08 | Some more #if cleanup | Patrick Georgi |
2012-05-08 | Clean up #ifs | Patrick Georgi |
2012-05-01 | Move VSA support from x86 to Geode | Patrick Georgi |
2012-05-01 | Make geode_lx use the vsa from blobs repository | Patrick Georgi |
2012-04-30 | Rework ACPI CST table generation | Stefan Reinauer |
2012-04-27 | Move top level pc80 directory to drivers/ | Stefan Reinauer |
2012-04-25 | Replace cache control magic numbers with symbols | Patrick Georgi |
2012-04-22 | amd: Fix unused variable warning | Vikram Narayanan |
2012-04-16 | S3 code in coreboot public folder. | zbao |
2012-04-12 | S3 code in vendorcode folder. | zbao |
2012-04-02 | S3 code whitespaces changes. | zbao |
2012-03-16 | Rename AMD_AGESA to CPU_AMD_AGESA | Kyösti Mälkki |
2012-03-16 | Fix AMD Agesa leaking Kconfig | Kyösti Mälkki |
2012-02-20 | Fix MTRR TOM2 WB cache setup for AMD CPUs > revF. | Marc Jones |
2012-02-17 | Remove whitespace. | Patrick Georgi |
2012-02-16 | AGESA F15: AGESA family15 model 00-0fh cpu wrapper | Kerry Sheh |
2012-02-13 | AMD Geode cpus: apply un-written naming rules | Kyösti Mälkki |
2012-01-09 | Fix Geode GX2 + LX caching for tiny bootblock. | Nils Jacobs |
2011-12-26 | Fix Fam10 MMCONF_SUPPORT_DEFAULT setting. | Marc Jones |
2011-12-13 | Use MMCONF for all AMD family 10 CPUs. | Marc Jones |
2011-11-22 | k8 raminit: add workaround for erratum #181 on non-fam-f | Florian Zumbiehl |
2011-11-01 | remove trailing whitespace | Stefan Reinauer |
2011-11-01 | Remove XIP_ROM_BASE | Patrick Georgi |
2011-10-30 | Fix slow CAR execution introduced by 7c7d87182feb78cb2bc02fb3558bef56a41682c9 | Rudolf Marek |
2011-10-28 | Get rid of AUTO_XIP_ROM_BASE | Patrick Georgi |
2011-10-17 | Fixes several issues with amd k8 SSDT P-state generation | Oskar Enoksson |
2011-10-11 | Fixed broken MTRR for >4GB memory on AMD K8 fam 0fh rev <=E | Oskar Enoksson |
2011-09-24 | Add AMD Family 10h PH-E0 support | QingPei Wang |
2011-09-07 | AMD F14 Rev C0 update | Kerry She |
2011-08-06 | Update AMD F14 Agesa to support Rev C0 cpus | efdesign98 |
2011-07-22 | Update AMD SR5650 and SB700 | efdesign98 |
2011-07-18 | Add AMD Family 10 support to cpu folder | efdesign98 |
2011-07-13 | Make AMD SMM SMP aware | Rudolf Marek |
2011-06-28 | Addition of Family12/SB900 wrapper code | efdesign98 |
2011-06-22 | Move existing AMD Ffamily14 code to f14 folder | efdesign98 |
2011-06-22 | Rename {CPU|NB|SB}/amd/*_wrapper folders | efdesign98 |
2011-05-15 | Cosmetic cleanup. | Scott Duplichan |
2011-05-15 | Correct the number of MCA error reporting banks cleared. | Scott Duplichan |
2011-05-15 | 1) Initialize BSP fixed MTRRs to match AP fixed MTRR initialization. | Scott Duplichan |
2011-05-10 | Change read_option() to a macro that wraps some API uglyness | Patrick Georgi |
2011-04-21 | more ifdef -> if fixes. | Stefan Reinauer |
2011-04-21 | more ifdef -> if fixes | Stefan Reinauer |
2011-04-14 | Use symbolic names for some MTRR bits instead of numbers in CAR code | Stefan Reinauer |
2011-04-11 | Unify use of post_code | Alexandru Gagniuc |
2011-03-28 | Add AMD C32 support. | Zheng Bao |
2011-03-17 | Fix breaking the build after removing files in tthe previous checkin. | Marc Jones |
2011-03-04 | Add P-states for select Socket 754 processors. | Jonathan Kollasch |
2011-03-03 | Correct off-by-one problem in AMD pre-rev-F model-F PowerNow code. | Jonathan Kollasch |
2011-02-28 | Improving BKDG implementation of P-states, | Xavi Drudis Ferran |
2011-02-28 | Improving BKDG implementation of P-states, | Xavi Drudis Ferran |
2011-02-28 | Improving BKDG implementation of P-states, | Xavi Drudis Ferran |
2011-02-28 | Improving BKDG implementation of P-states, | Xavi Drudis Ferran |
2011-02-28 | Improving BKDG implementation of P-states, | Xavi Drudis Ferran |
2011-02-28 | Improving BKDG implementation of P-states, | Xavi Drudis Ferran |
2011-02-28 | Improving BKDG implementation of P-states, | Xavi Drudis Ferran |
2011-02-28 | Improving BKDG implementation of P-states, | Xavi Drudis Ferran |
2011-02-28 | Improving BKDG implementation of P-states, | Xavi Drudis Ferran |
2011-02-28 | Improving BKDG implementation of P-states, | Xavi Drudis Ferran |
2011-02-28 | Improving BKDG implementation of P-states, | Xavi Drudis Ferran |
2011-02-28 | Improving BKDG implementation of P-states, | Xavi Drudis Ferran |
2011-02-28 | Improving BKDG implementation of P-states, | Xavi Drudis Ferran |
2011-02-28 | Improving BKDG implementation of P-states, | Xavi Drudis Ferran |
2011-02-28 | Improving BKDG implementation of P-states, | Xavi Drudis Ferran |
2011-02-28 | Prepare for next patches (Improving BKDG implementation of P-states, | Xavi Drudis Ferran |
2011-02-27 | Prepare for next patches (Improving BKDG implementation of P-states, | Xavi Drudis Ferran |
2011-02-27 | Prepare for next patches (Improving BKDG implementation of P-states, | Xavi Drudis Ferran |
2011-02-27 | Prepare for next patches (Improving BKDG implementation of P-states, | Xavi Drudis Ferran |
2011-02-27 | Prepare for next patches (Improving BKDG implementation of P-states, | Xavi Drudis Ferran |
2011-02-27 | Prepare for next patches (Improving BKDG implementation of P-states, | Xavi Drudis Ferran |
2011-02-27 | Prepare for next patches (Improving BKDG implementation of P-states, | Xavi Drudis Ferran |
2011-02-27 | Prepare for next patches (Improving BKDG implementation of P-states, | Xavi Drudis Ferran |
2011-02-26 | Make AMD Fam10h CPU microcode updates optional in Expert mode | Xavi Drudis Ferran |