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path: root/src/cpu/amd
AgeCommit message (Expand)Author
2011-09-24Add AMD Family 10h PH-E0 supportQingPei Wang
2011-09-07AMD F14 Rev C0 updateKerry She
2011-08-06Update AMD F14 Agesa to support Rev C0 cpusefdesign98
2011-07-22Update AMD SR5650 and SB700efdesign98
2011-07-18Add AMD Family 10 support to cpu folderefdesign98
2011-07-13Make AMD SMM SMP awareRudolf Marek
2011-06-28Addition of Family12/SB900 wrapper codeefdesign98
2011-06-22Move existing AMD Ffamily14 code to f14 folderefdesign98
2011-06-22Rename {CPU|NB|SB}/amd/*_wrapper foldersefdesign98
2011-05-15Cosmetic cleanup.Scott Duplichan
2011-05-15Correct the number of MCA error reporting banks cleared.Scott Duplichan
2011-05-151) Initialize BSP fixed MTRRs to match AP fixed MTRR initialization.Scott Duplichan
2011-05-10Change read_option() to a macro that wraps some API uglynessPatrick Georgi
2011-04-21more ifdef -> if fixes.Stefan Reinauer
2011-04-21more ifdef -> if fixesStefan Reinauer
2011-04-14Use symbolic names for some MTRR bits instead of numbers in CAR codeStefan Reinauer
2011-04-11Unify use of post_codeAlexandru Gagniuc
2011-03-28Add AMD C32 support.Zheng Bao
2011-03-17Fix breaking the build after removing files in tthe previous checkin. Marc Jones
2011-03-04Add P-states for select Socket 754 processors.Jonathan Kollasch
2011-03-03Correct off-by-one problem in AMD pre-rev-F model-F PowerNow code.Jonathan Kollasch
2011-02-28Improving BKDG implementation of P-states,Xavi Drudis Ferran
2011-02-28Improving BKDG implementation of P-states,Xavi Drudis Ferran
2011-02-28Improving BKDG implementation of P-states,Xavi Drudis Ferran
2011-02-28Improving BKDG implementation of P-states,Xavi Drudis Ferran
2011-02-28Improving BKDG implementation of P-states,Xavi Drudis Ferran
2011-02-28Improving BKDG implementation of P-states,Xavi Drudis Ferran
2011-02-28Improving BKDG implementation of P-states,Xavi Drudis Ferran
2011-02-28Improving BKDG implementation of P-states,Xavi Drudis Ferran
2011-02-28Improving BKDG implementation of P-states,Xavi Drudis Ferran
2011-02-28Improving BKDG implementation of P-states,Xavi Drudis Ferran
2011-02-28Improving BKDG implementation of P-states,Xavi Drudis Ferran
2011-02-28Improving BKDG implementation of P-states,Xavi Drudis Ferran
2011-02-28Improving BKDG implementation of P-states,Xavi Drudis Ferran
2011-02-28Improving BKDG implementation of P-states,Xavi Drudis Ferran
2011-02-28Improving BKDG implementation of P-states,Xavi Drudis Ferran
2011-02-28Prepare for next patches (Improving BKDG implementation of P-states,Xavi Drudis Ferran
2011-02-27Prepare for next patches (Improving BKDG implementation of P-states,Xavi Drudis Ferran
2011-02-27Prepare for next patches (Improving BKDG implementation of P-states,Xavi Drudis Ferran
2011-02-27Prepare for next patches (Improving BKDG implementation of P-states,Xavi Drudis Ferran
2011-02-27Prepare for next patches (Improving BKDG implementation of P-states,Xavi Drudis Ferran
2011-02-27Prepare for next patches (Improving BKDG implementation of P-states,Xavi Drudis Ferran
2011-02-27Prepare for next patches (Improving BKDG implementation of P-states,Xavi Drudis Ferran
2011-02-27Prepare for next patches (Improving BKDG implementation of P-states,Xavi Drudis Ferran
2011-02-26Make AMD Fam10h CPU microcode updates optional in Expert modeXavi Drudis Ferran
2011-02-26It adds support for automatic PSS object generation for AMD pre fam Fh CPU. T...Rudolf Marek
2011-02-24Add compile-time defaults to some K8 CMOS options in case they're absent in CMOSJosef Kellermann
2011-02-14Add AMD cpu wrapper code. Patch 4 of 8.Frank Vibrans
2011-02-10According to AMD documentation, cache type WP should be used forScott Duplichan
2011-02-10Implemented workaround for erratum 169, obsoleting erratum 131.Alexandru Gagniuc
2011-02-10Fix a potential system hang by handling AMD Model F Erratum 89Josef Kellermann
2011-01-19Revert r5902 to make code more readable again. At least three people like toStefan Reinauer
2011-01-12drop unused filesStefan Reinauer
2011-01-01Add AMD SB800 southbridge CIMx code.Kerry She
2010-12-30Remove duplicated GX2 processor IIOC mode setting on CS5535 southbridge codeNils Jacobs
2010-12-26Remove dead and unused Geode GX2 codeNils Jacobs
2010-12-26Replace Geode GX2 MSR addresses for GLCP on GLIU1 with namesNils Jacobs
2010-12-26Clean up Geode GX2 comments, whitespace and coding style. Trivial.Nils Jacobs
2010-12-18SMM on AMD K8 Part 2/2Rudolf Marek
2010-12-18SMM for AMD K8 Part 1/2Stefan Reinauer
2010-12-08Move "select CACHE_AS_RAM" lines from boards into CPU socket.Uwe Hermann
2010-11-221) wraps the s3 parts of chipset code/memory init code with if CONFIG_HAVE_AC...Rudolf Marek
2010-11-18Eliminate SET_NB_CFG_54 option. There was no board thatPatrick Georgi
2010-11-16Move the SET_FIDVID* family of configuration options to Kconfig andPatrick Georgi
2010-11-13MTRR related improvements for AMD family 10h and family 0Fh systemsScott Duplichan
2010-11-09This fixes a FIXME in src/cpu/amd/mtrr/amd_mtrr.c and shuts up theTobias Diedrich
2010-11-03Clean up some more comments and white space in model_gx2/cpureginit.c.Nils Jacobs
2010-10-31Fix AMD family 10h engineering sample is reported as 'thermal test kit'.Scott Duplichan
2010-10-26reg is only used inside the #if clause, so declare it there. trivial.Patrick Georgi
2010-10-19For AMD family 10h processors, msr c0010058 is always programmedScott Duplichan
2010-10-19Modernize socket_754 Kconfig with CAR and address bits information.Jonathan Kollasch
2010-10-19Revision 5966 changed the end of line style of the 3 modified files. This cha...Scott Duplichan
2010-10-19When debug logging is enabled, a message such as '* AP 02 timed out:02010501'Scott Duplichan
2010-10-12We define IO_APIC_ADDR in <arch/ioapic.h>, let's use it.Uwe Hermann
2010-10-12Reduce duplicate definition in CAR code.Warren Turkal
2010-10-11Factor out a few commonly duplicated functions from northbridge.c.Uwe Hermann
2010-10-07Remove some duplicate #include files (trivial).Uwe Hermann
2010-10-07Remove duplicate line from pci_ids.h.Jonathan Kollasch
2010-10-02Add comments to make it clear why these two lines are written like that:Uwe Hermann
2010-10-01Factor out common CAR asm snippets.Uwe Hermann
2010-10-01Add missing parenthesis (trivial).Uwe Hermann
2010-10-01CAR simplifications, typos, readability improvements (trivial).Uwe Hermann
2010-09-30Various cosmetic and coding style fixes in CAR code (trivial).Uwe Hermann
2010-09-30Use existing, readable MTRR #defines instead of hardcoding numbers.Uwe Hermann
2010-09-30Rename build system variables to be more intuitive, andPatrick Georgi
2010-09-30fix Kontron KT690 and clean up socket S1G1 boards accordingly.Stefan Reinauer
2010-09-30Move CAR settings to board config for socket 940 boards.Warren Turkal
2010-09-29Factor out fill_processor_name() and strcpy() functions.Uwe Hermann
2010-09-27All these boards already had the CACHE_AS_RAM option in their individualWarren Turkal
2010-09-27Move CAR config from mainboard to CPU config for AMD GX2 boards.Warren Turkal
2010-09-27drop some dead code from model_fxx_init.cStefan Reinauer
2010-09-26drop some more unneeded ../../..Stefan Reinauer
2010-09-26dumpmmcr utility is available under util and shares most of the code.Stefan Reinauer
2010-09-25- Fix race condition in option_table.h generation by moving the includeStefan Reinauer
2010-09-23Whitespace/typo/cosmetic fixes (trivial).Uwe Hermann
2010-09-17Clear bit 35 of msr c001_102a in Fam10 rev C cores.Arne Georg Gleditsch
2010-09-16Add more Fam10 CPUID strings from the AMD revision guide. IncludesMarc Jones
2010-09-14This patch corrects a coding error in the original implementationScott Duplichan
2010-09-13CONFIG_MMCONF_SUPPORT is always defined. Fix build.Myles Watson
2010-09-13Move initialization of MMCONF BAR to cache_as_ram setup phase, in orderArne Georg Gleditsch
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