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path: root/src/cpu/amd/model_10xxx
AgeCommit message (Expand)Author
2009-05-14Update equivalent processor revision ID to load latest microcode patches andMarc Jones
2009-04-28dd the family10h Rev C0-C2 support to coreboot.Vincent Lim vincent.lim
2009-04-01Updated microcode for for AMD Fam10 DR-B2 and B3.Zheng Bao
2009-03-25The latest ucode patches for Family 10h:Zeng Bao
2009-01-19First shot at factoring SMM code into generic parts and southbridge specificStefan Reinauer
2008-10-01The ARRAY_SIZE macro is convenient, yet mostly unused. Switch lots ofCarl-Daniel Hailfinger
2008-07-23Add AMD Fam10 B3 default settings to match AMD example code.Marc Jones
2008-07-23Update to the latest AMD Fam10 microcode patches.Marc Jones
2008-07-17Add Fam10 Gart table walk enable for MCA reporting to match AMD example code.Marc Jones
2008-04-25Remove inline from FAM10 CPU initialization functions.Marc Jones
2008-04-24Add CPUID processor name string support for Fam10 CPUs.Marc Jones
2008-04-24On APs the ClLinesToNbDis was being left enabled from CAR setup.Marc Jones
2008-04-22Clean up and remove late initialization code that is no longer needed.Marc Jones
2008-04-22Find matching settings for each CPUs FID, VID, and P-state registers and init...Marc Jones
2008-04-22Update the FAM10 microcode to current versions.Marc Jones
2008-04-22Missed this file in the previous check-in, r3248.Marc Jones
2008-04-22Add early MSR and PCI register initialization. Marc Jones
2008-04-07Re-add files I deleted by mistake in r3219. They are meant for a differentMarc Jones (marc.jones
2008-04-07Don't check exclusive IRQ fieldin the PIR table.Marc Jones(marc.jones
2008-01-18Please bear with me - another rename checkin. This qualifies as trivial, noStefan Reinauer
2007-12-19Initial AMD Barcelona support for rev Bx.Marc Jones
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