index
:
coreboot.git
macbookair5_2
macbookpro10_1
main
master
mbp101_medisable
mbp101_medisable_1
mbp82
x230
my copy of coreboot
User &
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
src
/
cpu
/
amd
/
model_10xxx
Age
Commit message (
Expand
)
Author
2009-01-19
First shot at factoring SMM code into generic parts and southbridge specific
Stefan Reinauer
2008-10-01
The ARRAY_SIZE macro is convenient, yet mostly unused. Switch lots of
Carl-Daniel Hailfinger
2008-07-23
Add AMD Fam10 B3 default settings to match AMD example code.
Marc Jones
2008-07-23
Update to the latest AMD Fam10 microcode patches.
Marc Jones
2008-07-17
Add Fam10 Gart table walk enable for MCA reporting to match AMD example code.
Marc Jones
2008-04-25
Remove inline from FAM10 CPU initialization functions.
Marc Jones
2008-04-24
Add CPUID processor name string support for Fam10 CPUs.
Marc Jones
2008-04-24
On APs the ClLinesToNbDis was being left enabled from CAR setup.
Marc Jones
2008-04-22
Clean up and remove late initialization code that is no longer needed.
Marc Jones
2008-04-22
Find matching settings for each CPUs FID, VID, and P-state registers and init...
Marc Jones
2008-04-22
Update the FAM10 microcode to current versions.
Marc Jones
2008-04-22
Missed this file in the previous check-in, r3248.
Marc Jones
2008-04-22
Add early MSR and PCI register initialization.
Marc Jones
2008-04-07
Re-add files I deleted by mistake in r3219. They are meant for a different
Marc Jones (marc.jones
2008-04-07
Don't check exclusive IRQ fieldin the PIR table.
Marc Jones(marc.jones
2008-01-18
Please bear with me - another rename checkin. This qualifies as trivial, no
Stefan Reinauer
2007-12-19
Initial AMD Barcelona support for rev Bx.
Marc Jones
