summaryrefslogtreecommitdiff
path: root/src/cpu/amd/agesa
AgeCommit message (Expand)Author
2013-08-15AMD Kabini: Split DSDT into common sectionsMike Loptien
2013-08-05AMD Kabini: Add CPU AGESA wrapper for new AMD processor familySiyuan Wang
2013-07-16AMD Fam15tn: Split DSDT into common sectionsSteve Goodrich
2013-07-10AMD: Kconfig cleanupKyösti Mälkki
2013-06-29AMD S3 resume: Add framwork to write bigger dataSiyuan Wang
2013-06-13AMD S3 resume: use a function to replace duplicated codeSiyuan Wang
2013-05-24cpu/amd/agesa/Kconfig: Select LAPIC_MONOTONIC_TIMERPaul Menzel
2013-05-08src/cpu/amd/agesa/Kconfig: Use tabs instead of spaces for alignmentPaul Menzel
2013-05-03cpu/amd/agesa/family15tn/Kconfig: Remove unneeded `UDELAY_LAPIC`Paul Menzel
2013-05-03mainboard/{asus/f2a85-m,amd/thatcher}: move UDELAY_LAPICDavid Hubbard
2013-04-11Persimmon/Fam14/SB800 DSDT: Split into common areasMike Loptien
2013-04-04AMD: Drop six copies of wrmsr_amd and rdmsr_amdKyösti Mälkki
2013-03-22x86: unify amd and non-amd MTRR routinesAaron Durbin
2013-03-01GPLv2 notice: Unify all files to just use one space in »MA 02110-1301«Paul Menzel
2013-02-28Drop CONFIG_WRITE_HIGH_TABLESStefan Reinauer
2013-02-26AGESA: skip s3_resume.h if CONFIG_HAVE_ACPI_RESUME is disabledJens Rottmann
2013-02-26Revert "AMD S3: Program the flash in a bigger data packet"Dave Frodin
2013-02-21AMD S3: Introduce Kconfig variable 'S3_DATA_SIZE'Zheng Bao
2013-02-19AMD S3: Change S3_VOLATILE_POS to S3_DATA_POSZheng Bao
2013-02-18AMD S3: Program the flash in a bigger data packetZheng Bao
2013-02-18AMD S3: Include the s3_resume.h only when S3 is enabled.Zheng Bao
2013-02-11spi.h: Rename the spi.h to spi-generic.hZheng Bao
2013-02-11AMD S3: Add missing erasing flash sector for saving MTRR registerZheng Bao
2013-02-11AMD S3: Change the hardcoded data size to macros.Zheng Bao
2013-01-25AGESA: Kconfig: Drop useless depends statementPatrick Georgi
2013-01-11AMD: Set the mask of MTRR according to CONFIG_CPU_ADDR_BITSZheng Bao
2012-12-12Claim the SPI bus before writes if the IMC ROM is presentMartin Roth
2012-11-30AMD S3: Leverage the public SPI routineZheng Bao
2012-11-27Remove AMD special case for LAPIC based udelay()Patrick Georgi
2012-11-27Get rid of drivers classPatrick Georgi
2012-11-20Unify use of bool config variablesStefan Reinauer
2012-11-20Make sure only one udelay function is availableStefan Reinauer
2012-11-02AMD agesa: add enable cache at the end of disable_cache_as_ramSiyuan Wang
2012-10-07Remove chip.h files without config structureKyösti Mälkki
2012-08-22Auto-declare chip_operationsKyösti Mälkki
2012-08-09Synchronize rdtsc instructionsStefan Reinauer
2012-08-05AMD S3: Remove the hardcoded volatile positionzbao
2012-08-04Make the device tree available in the rom stageStefan Reinauer
2012-07-14Remove useless file from building.zbao
2012-07-03AGESA F15 wrapper for Trinityzbao
2012-05-08Clean up #ifsPatrick Georgi
2012-04-25Replace cache control magic numbers with symbolsPatrick Georgi
2012-04-22amd: Fix unused variable warningVikram Narayanan
2012-04-16S3 code in coreboot public folder.zbao
2012-04-12S3 code in vendorcode folder.zbao
2012-04-02S3 code whitespaces changes.zbao
2012-03-16Rename AMD_AGESA to CPU_AMD_AGESAKyösti Mälkki
2012-03-16Fix AMD Agesa leaking KconfigKyösti Mälkki
2012-02-17Remove whitespace.Patrick Georgi
2012-02-16AGESA F15: AGESA family15 model 00-0fh cpu wrapperKerry Sheh
2011-11-01remove trailing whitespaceStefan Reinauer
2011-11-01Remove XIP_ROM_BASEPatrick Georgi
2011-09-07AMD F14 Rev C0 updateKerry She
2011-08-06Update AMD F14 Agesa to support Rev C0 cpusefdesign98
2011-07-18Add AMD Family 10 support to cpu folderefdesign98
2011-06-28Addition of Family12/SB900 wrapper codeefdesign98
2011-06-22Move existing AMD Ffamily14 code to f14 folderefdesign98
2011-06-22Rename {CPU|NB|SB}/amd/*_wrapper foldersefdesign98
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-01 23:34:24 +0000