coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2015-09-04	x86: remove cpu_incs as romstage Make variable	Aaron Durbin
2015-05-26	AGESA: Split S3 support file	Kyösti Mälkki
2015-05-26	AGESA: Move S3 related SPI writes again	Kyösti Mälkki
2015-05-21	Remove address from GPLv2 headers	Patrick Georgi
2015-03-07	AGESA: Move agesawrappers related to HAVE_ACPI_RESUME support	Kyösti Mälkki
2014-12-03	AGESA: Common agesawrapper for S3 resume	Kyösti Mälkki
2014-11-27	cpu/amd/agesa/family15rl: Provide Richland CPU support	Edward O'Callaghan
2014-11-20	AMD: Isolate AGESA and PI build environments	Kyösti Mälkki
2014-08-30	AMD Steppe Eagle: CPU files for new SoC	Bruce Griffith
2014-07-03	AGESA: Add agesawrapper_post_device()	Kyösti Mälkki
2014-07-03	AGESA boards: Use acpi_s3_resume_allowed()	Kyösti Mälkki
2014-07-03	AGESA: Clean separation of SPI flash	Kyösti Mälkki
2014-06-25	AGESA: Move config parameters for non-volatile S3 data	Kyösti Mälkki
2014-06-06	AGESA: Use common heap allocator	Kyösti Mälkki
2013-08-05	AMD Kabini: Add CPU AGESA wrapper for new AMD processor family	Siyuan Wang
2013-03-01	GPLv2 notice: Unify all files to just use one space in »MA 02110-1301«	Paul Menzel
2012-11-27	Remove AMD special case for LAPIC based udelay()	Patrick Georgi
2012-07-03	AGESA F15 wrapper for Trinity	zbao
2012-04-16	S3 code in coreboot public folder.	zbao
2012-02-16	AGESA F15: AGESA family15 model 00-0fh cpu wrapper	Kerry Sheh
2011-07-18	Add AMD Family 10 support to cpu folder	efdesign98
2011-06-28	Addition of Family12/SB900 wrapper code	efdesign98
2011-06-22	Rename {CPU\|NB\|SB}/amd/*_wrapper folders	efdesign98