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2008-11-30ok, another attempt to the build_opt_tbl problem:Stefan Reinauer
- create temp files and move them afterwards - remove dummy option -b - fix usage - drop implicit creation of .c file if no --option is specified. Now let's see if this fixes the issue. :-) We don't want to take 24s instead of 6s to build an image reliably (Yes, yes, I know Tiano takes over 20 minutes) Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3783 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-11-28This patch from Ralf Grosse Boerger makes debugging more comfortable. Stefan Reinauer
With this patch it's possible to - determine the according source code line for each asm statement (objdump -dS) - determine the source code file for each asm statement (objdump -ddl) This isn't exactly trivial because cache_as_ram_auto.c gets compiled to assembly and converted by a perl script afterwards. This patch solves the problem - by extending cache_as_ram_auto.inc with debug information and line numbers - by correcting the perl calls (".text" --> "\.text") - by creating a disassembly with source code and line numbers. (ctr0.disasm and coreboot.disasm) There's one minor downside to the patch: A complete abuild run takes up around 1.6G instead of about 700MB now. But I'm sure this is quite reasonable for the benefits. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Please commit while this is being worked out. Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3778 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-11-28This patch fixes the ugly race condition created through build_opt_tblStefan Reinauer
running twice at the same time, overwriting its output files. This caused a depending rule to produce an object file with no symbols in it. This should silence up the regularly happening build failure messages on the mailing list since we moved to the newer, much faster server. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3777 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-10-16Revision 3564 improved compilation time, but it also introduced aCarl-Daniel Hailfinger
dependency bug which hit people running parallel make instances. With our current makefile architecture, the "right" fix is impossible. However, we can still kill the race conditions leading to arbitrary compilation failures. That trick depends on the atomicity of the mv command. Extensive comments explain what the workaround does. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3663 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-09-04This changes the python generated makefilesCarl-Daniel Hailfinger
targets/*/*/Makefile targets/*/*/normal/Makefile targets/*/*/fallback/Makefile to use a common copy of romcc, and to leave this compiler untouched by 'make clean' in targets/*/*/fallback/ and targets/*/*/normal/ . 'make clean' in targets/*/*/ will clean romcc. Thanks to Mats for the initial idea and implementation of a tool to do this. This patch has almost the same behaviour as the original tool without having to run the tool each time. Tested for abuild-friendliness. The patch saves ~10-12 seconds for every target using romcc. For a full abuild run, this is ~20% time saved. For the first 38 abuild targets, total build time is down to 13m24s instead of 16m22s on my machine. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Mats Erik Andersson <mats.andersson@gisladisker.se> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3564 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-08-01clean out obsoleted config.lb rules and output, fix indenting (trivial)Stefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3457 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-02-09add $(CROSS_COMPILE) to ar calls.Marc Jones
Signed-off-by: Marc Jones <marc.jones@amd.com> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3100 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-01-22Use "--build-id=none" as linker flags if build-id is supported.Marc Karasek
That fixes a compilation failure. Signed-off-by: Marc Karasek <marc.karasek@sun.com> Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Joseph Smith <joe@smittys.pointclark.net> Acked-by: Myles Watson <myles@pel.cs.byu.edu> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3073 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-01-18rename linuxbios_* files, too.Stefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3057 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-01-18Rename almost all occurences of LinuxBIOS to coreboot. Stefan Reinauer
Due to the automatic nature of this update, I am self-acking. It worked in abuild. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3053 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-01-08Ubuntu's gcc doesn't write "install:" in german locales.Patrick Georgi
Normalize used locale to "C" before parsing output. Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3037 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-10-04AMD Rev F supportYinghai Lu
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2435 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-02-06make doxygen workRonald G. Minnich
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2170 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-01-28This is the change so that we can readable ldscript.ldRonald G. Minnich
amd/rumba now builds. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2169 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-09-09Modifications for building LinuxBIOS under cygwin.Steven J. Magnani
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2015 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-07-26move x86 CAR related stuff to arch/i386/Config.lbLi-Ta Lo
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1987 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-07-20backed outGreg Watson
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1985 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-07-20Updated ep405pc to latest config system.Greg Watson
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1984 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-07-06Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-57arch import user (historical)
Creator: Li-Ta Lo <ollie@lanl.gov> shit put "use CONFIG_USE_INIT" in the global Config.lb git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1975 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-07-06Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-51arch import user (historical)
Creator: Yinghai Lu <yhlu@tyan.com> cache_as_ram for AMD and some intel git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1967 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-11-04- Update abuild.sh so it will rebuild successfull buildsEric Biederman
- Move pci_set_method out of hardwaremain.c - Re-add debugging name field but only include the CONFIG_CHIP_NAME is enabled. All instances are now wrapped in CHIP_NAME - Many minor cleanups so most ports build. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1737 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-10-30- To reduce confuse rename the parts of linuxbios bios that run fromEric Biederman
ram linuxbios_ram instead of linuxbios_c and linuxbios_payload... - Reordered the linker sections so the LinuxBIOS fallback image can take more the 64KiB on x86 - ROM_IMAGE_SIZE now will work when it is specified as larger than 64KiB. - Tweaked the reset16.inc and reset16.lds to move the sanity check to see if everything will work. - Start using romcc's built in preprocessor (This will simplify header compiler checks) - Add helper functions for examining all of the resources - Remove debug strings from chip.h - Add llshell to src/arch/i386/llshell (Sometime later I can try it...) - Add the ability to catch exceptions on x86 - Add gdb_stub support to x86 - Removed old cpu options - Added an option so we can detect movnti support - Remove some duplicate definitions from pci_ids.h - Remove the 64bit resource code in amdk8/northbridge.c in preparation for making it generic - Minor romcc bug fixes git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1727 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-10-14- First pass through with with device tree enhancement merge. Most of the ↵Eric Biederman
mechanisms should be in place but don't expect anything to quite work yet. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1662 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-06-29- Small bug fixes to romcc. The deep problems with not inlining functions ↵Eric Biederman
remain git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1615 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-05-28- Added volatile to asm statements in auto.c and failover.cEric Biederman
- Updated the romcc version in Config.lb - Fixed type sizes in romcc_io.h and io.h inl() returning a byte was nasty git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1583 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-03-11- Moved hlt() to it's own header.Eric Biederman
- Reworked pnp superio device support. Now complete superio support is less than 100 lines. - Added support for hard coding resource assignments in Config.lb - Minor bug fixes to romcc - Initial support for catching the x86 processor BIST error codes. I've only seen this trigger once in production during a very suspcious reset but... - added raminit_test to test the code paths in raminit.c for the Opteron - Removed the IORESOURCE_SET bit and added IORESOURCE_ASSIGNED and IORESOURCE_STORED so we can tell what we have really done. - Added generic AGP/IOMMU setting code to x86 - Added an implementation of memmove and removed reserved identifiers from memcpy - Added minimal support for booting on pre b3 stepping K8 cores - Moved the checksum on amd8111 boards because our default location was on top of extended RTC registers - On the Hdama added support for enabling i2c hub so we can get at the temperature sensors. Not that i2c bus was implemented well enough to make that useful. - Redid the Opteron port so we should only need one reset and most of memory initialization is done in cpu_fixup. This is much, much faster. - Attempted to make the VGA IO region assigment work. The code seems to work now... - Redid the error handling in amdk8/raminit.c to distinguish between a bad value and a smbus error, and moved memory clearing out to cpufixup. - Removed CONFIG_KEYBOARD as it was useless. See pc87360/superio.c for how to setup a legacy keyboard properly. - Reworked the register values for standard hardware, moving the defintions from chip.h into the headers of the initialization routines. This is much saner and is actually implemented. - Made the hdama port an under clockers BIOS. I debuged so many interesting problems. - On amd8111_lpc added setup of architectural/legacy hardware - Enabled PCI error reporting as much as possible. - Enhanded build_opt_tbl to generate a header of the cmos option locations so that romcc compiled code can query the cmos options. - In romcc gracefully handle function names that degenerate into function pointers - Bumped the version to 1.1.6 as we are getting closer to 2.0 TODO finish optimizing the HT links of non dual boards TODO make all Opteron board work again TODO convert all superio devices to use the new helpers TODO convert the via/epia to freebios2 conventions TODO cpu fixup/setup by cpu type git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1390 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-11-09support for init objectsGreg Watson
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1273 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-22- Update the romcc versionEric Biederman
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1226 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-11 - O2, enums, and switch statements work in romccEric Biederman
- Support for compiling romcc on non x86 platforms - new romc options -msse and -mmmx for specifying extra registers to use - Bug fixes to device the device disable/enable framework and an amd8111 implementation - Move the link specification to the chip specification instead of the path - Allow specifying devices with internal bridges. - Initial via epia support - Opteron errata fixes git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1200 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-30updates from YhLu, plus fixes for PPC/K8 issues.Ronald G. Minnich
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1059 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-23updates for hdama and other things.Ronald G. Minnich
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1004 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-20chip stuffGreg Watson
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@988 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-14new config rulesGreg Watson
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@960 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-06-24needed rules for DRIVERRonald G. Minnich
more fixes to various Config.lb one last problem and we're there git-svn-id: svn://svn.coreboot.org/coreboot/trunk@911 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-06-24For new config.gGreg Watson
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@903 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-06-17added config and other test files.Ronald G. Minnich
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@882 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1