coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2020-11-16	commonlib: Add timestamp values for forced delays	Martin Roth
2020-08-28	src: Remove incorrect x86 exception not from TS_DONE_LOADING description	Hung-Te Lin
2020-06-14	drivers/intel/fsp2_0: Add FSP 2.2 specific support	Subrata Banik
2020-05-11	treewide: Remove "this file is part of" lines	Patrick Georgi
2020-04-04	src/commonlib: Use SPDX for GPL-2.0-only files	Angel Pons
2020-02-24	src: capitalize 'RAM'	Elyes HAOUAS
2019-11-20	security/vboot/sync_ec: Add timestamps	Tim Wawrzynczak
2019-09-10	AUTHORS: Move src/commonlib copyrights into AUTHORS file	Martin Roth
2019-03-07	arch/x86/postcar: Add separate timestamp for postcar stage	Subrata Banik
2018-10-08	Move compiler.h to commonlib	Nico Huber
2018-05-13	timestamp: Add timestamps for TPM communication	Raul E Rangel
2018-05-04	commonlib: Add descriptions for new AGESA timestamps	Martin Roth
2018-03-08	timestamps: Add timestamps around the vbios load & init	Martin Roth
2018-01-31	commonlib: Add AGESA S3 resume defines	Marshall Dawson
2017-12-11	commonlib: Add timestamp codes for AGESA	Martin Roth
2017-09-27	commonlib: Consistently spell romstage without space	Paul Menzel
2017-09-13	sb/intel/bd82x6x: Add time-stamp around ME DRAM update	Nathaniel Roach
2017-07-13	Rename __attribute__((packed)) --> __packed	Stefan Reinauer
2016-12-07	lib: Add time stamp when starting to finalize chips	Paul Menzel
2016-11-12	drivers/intel/fsp2_0: track end of firmware notifications	Aaron Durbin
2016-07-20	cbmem: share additional time stamps IDs	Antonello Dettori
2016-02-22	cbfs: Add LZ4 in-place decompression support for pre-RAM stages	Julius Werner
2016-01-27	chromeos: Add timestamps to measure VPD read times	Julius Werner
2015-10-31	tree: drop last paragraph of GPL copyright header	Patrick Georgi
2015-09-22	coreboot: introduce commonlib	Aaron Durbin