coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2016-10-18	arch/riscv: In trap handler, don't print SP twice	Jonathan Neuschäfer
2016-10-15	arch/riscv: Visually align trap frame information	Jonathan Neuschäfer
2016-10-15	riscv: Use the generic src/lib/bootblock.c	Jonathan Neuschäfer
2016-10-15	arch/riscv: Remove unused bootblock_simple.c	Jonathan Neuschäfer
2016-10-15	riscv: Clean up {qemu,spike}_util	Jonathan Neuschäfer
2016-10-15	riscv and power8: Convert printk/while(1) to die	Jonathan Neuschäfer
2016-10-07	src/arch: Remove whitespace after sizeof	Elyes HAOUAS
2016-10-07	x86/acpi_device: Add support for GPIO output polarity	Furquan Shaikh
2016-10-07	x86/acpi_device: Fix writing of array property	Furquan Shaikh
2016-10-07	RISCV: update the encoding.h file.	Ronald G. Minnich
2016-10-06	arm64: Use 'payload' format for ATF instead of 'stage'	Simon Glass
2016-09-27	x86: acpi: Use GOOG ID for coreboot table	Duncan Laurie
2016-09-21	x86: acpi: Add function for querying GPE status	Duncan Laurie
2016-09-21	Makefiles: update cbfs types from bare numbers to values	Martin Roth
2016-09-20	arm_tf: Fix code style nits and comments	Simon Glass
2016-09-19	Revert "x86: acpi: Add function for querying GPE status"	Duncan Laurie
2016-09-19	x86: acpi: Add function for querying GPE status	Duncan Laurie
2016-09-19	arch/x86,lib: make cbmem console work in postcar stage	Aaron Durbin
2016-09-19	arch/x86: move postcar main logic into C	Aaron Durbin
2016-09-15	arch/acpi_ivrs.h: Update 8-byte IVRS entry values	Martin Roth
2016-09-12	src/arch: Improve code formatting	Elyes HAOUAS
2016-09-12	arch/arm: Add armv7-r configuration	Hakim Giydan
2016-09-12	arch/x86: Utilize additional MTRRs in postcar_frame_add_mtrr	Rizwan Qureshi
2016-09-12	arch/x86: Always compile postcar library in romstage	Rizwan Qureshi
2016-09-07	include/arch/acpi.h: change IVRS efr field to iommu_feature_info	Martin Roth
2016-09-07	x86/acpi.c: use #define for IVRS revision field	Martin Roth
2016-09-07	arch/x86/include: Add #defines for IVRS tables	Martin Roth
2016-09-04	arch/acpi.h: add #if guard to handle the absence of device_t type	Antonello Dettori
2016-08-29	arch/riscv: Add missing "break;"	Jonathan Neuschäfer
2016-08-28	src/arch: Add required space before opening parenthesis '('	Elyes HAOUAS
2016-08-28	src/arch: Capitalize CPU and ACPI	Elyes HAOUAS
2016-08-23	arch/riscv: Add functions to read/write memory on behalf of supervisor/user mode	Jonathan Neuschäfer
2016-08-23	arch/riscv: Map the kernel space into RAM (2GiB+)	Jonathan Neuschäfer
2016-08-23	arch/riscv: Implement the SBI again	Jonathan Neuschäfer
2016-08-23	arch/riscv: Enable U-mode/S-mode counters (stime, etc.)	Jonathan Neuschäfer
2016-08-23	arch/riscv: Fix unaligned memory access emulation	Jonathan Neuschäfer
2016-08-23	arch/riscv: Delegate exceptions to supervisor mode if appropriate	Jonathan Neuschäfer
2016-08-23	arch/riscv: Print the page table structure after construction	Jonathan Neuschäfer
2016-08-23	arch/arm & arm64: Remove unnecessary whitespace before "\n"	Elyes HAOUAS
2016-08-15	arch/riscv: Improve and refactor trap handling diagnostics	Jonathan Neuschäfer
2016-08-15	arch/riscv: Set the stack pointer upon trap entry	Jonathan Neuschäfer
2016-08-11	arch/riscv: Fix the page table setup code	Jonathan Neuschäfer
2016-08-11	arch/riscv: Update encoding.h and dependent files	Jonathan Neuschäfer
2016-08-06	acpi: Generate object for coreboot table region	Duncan Laurie
2016-08-04	src/arch/riscv/id.S: Don't hardcode the strings	Jonathan Neuschäfer
2016-08-03	ACPI: Add code to create root port entry in DMAR table	Werner Zeh
2016-08-03	ACPI: Add code to include ATSR structure in DMAR table	Werner Zeh
2016-08-02	arch/riscv: Add include/arch/barrier.h	Jonathan Neuschäfer
2016-08-01	Remove non-ascii & unprintable characters	Martin Roth
2016-08-01	arch/x86: Enable postcar console	Lee Leahy
2016-08-01	arch/x86: Display MTRRs after MTRR update in postcar	Lee Leahy
2016-07-31	src/arch: Capitalize CPU, RAM and ROM	Elyes HAOUAS
2016-07-28	arch/riscv: Refactor bootblock.S	Jonathan Neuschäfer
2016-07-28	arch/riscv: Only initialize virtual memory if it's available	Jonathan Neuschäfer
2016-07-28	arch/riscv: Remove spinlock code from atomic.h	Jonathan Neuschäfer
2016-07-27	arch/x86: Add bootblock and postcar support for SOC MTRR access	Lee Leahy
2016-07-26	arch/x86: Generate a map file for the postcar stage	Lee Leahy
2016-07-26	arch/x86: Organize ramstage to match other stages	Lee Leahy
2016-07-26	arch/x86: Move romstage files into romstage section	Lee Leahy
2016-07-26	arch/x86: Move postcar stage commands into place	Lee Leahy
2016-07-19	arch/riscv: Enable unaligned load handling	Jonathan Neuschäfer
2016-07-18	arch/riscv: Remove enter_supervisor	Jonathan Neuschäfer
2016-07-18	arch/riscv: Change all eret instructions to .word 0x30200073 (mret)	Jonathan Neuschäfer
2016-07-17	acpi: Change API called to write the name for ACPI_DP_TYPE_CHILD	Harsha Priya
2016-07-15	arch/x86: provide common Intel ACPI hardware definitions	Aaron Durbin
2016-07-15	arch/x86: provide common ACPI_Sx constants	Aaron Durbin
2016-07-14	spike-riscv: Look for the CBFS in RAM	Jonathan Neuschäfer
2016-07-14	arch/riscv: Unconditionally start payloads in machine mode	Jonathan Neuschäfer
2016-07-08	acpi: Change device properties to work as a tree	Duncan Laurie
2016-07-07	acpigen_write_package: Return pointer to package element counter	Duncan Laurie
2016-07-02	acpi_device: Have acpi_device_scope() use a separate buffer	Duncan Laurie
2016-07-02	gpio: Add support for translating gpio_t into ACPI pin	Duncan Laurie
2016-06-28	riscv/bootblock.S: Register machine-mode, not supervisor-mode trap handler	Jonathan Neuschäfer
2016-06-28	arch/riscv: Show fault PC and load address on load access faults	Jonathan Neuschäfer
2016-06-28	arch/riscv: Move _start to the beginning of the bootblock	Jonathan Neuschäfer
2016-06-24	region: Add writeat and eraseat support	Antonello Dettori
2016-06-24	arch/x86/smbios: Correct manufacturer ID	Elyes HAOUAS
2016-06-22	ACPI S3: Add common recovery code	Kyösti Mälkki
2016-06-22	ACPI S3: Fix prohibited wakeup	Kyösti Mälkki
2016-06-22	ACPI S3: Split support for HAVE_ACPI_RESUME	Kyösti Mälkki
2016-06-22	ACPI S3: Move SMP trampoline recovery	Kyösti Mälkki
2016-06-22	Ignore RAMTOP for MTRRs	Kyösti Mälkki
2016-06-21	riscv-spike: Move coreboot to 0x80000000 (2GiB)	Jonathan Neuschäfer
2016-06-20	ACPI S3: Cleanup RSDP reference	Kyösti Mälkki
2016-06-20	arch/x86/smbios: Add DRAM manufacturer	Patrick Rudolph
2016-06-17	Move definitions of HIGH_MEMORY_SAVE	Kyösti Mälkki
2016-06-17	Define RAMTOP for x86 only	Kyösti Mälkki
2016-06-12	arch/riscv: Compile with -mcmodel=medany	Jonathan Neuschäfer
2016-06-12	arch/riscv: Add misc.c to bootblock/romstage to get udelay()	Jonathan Neuschäfer
2016-06-12	arch/riscv: copy read/write8/16/32 from x86	Jonathan Neuschäfer
2016-06-12	arch/riscv/trap_util.S: Use "li" pseudo-instruction to load a constant	Jonathan Neuschäfer
2016-06-11	arch/x86: Support "weak" BIST and timestamp save routines	Lee Leahy
2016-06-11	arch/x86: Add debug spinloops in assembly_entry.S	Lee Leahy
2016-06-11	arch/x86: Add debug spinloop	Lee Leahy
2016-06-09	mainboard: Support ROM_SIZE > 16 MiB	Lee Leahy
2016-06-09	arch/x86: Enable SSE in bootblock_crt0.S	Lee Leahy
2016-06-02	SMBIOS: Implement SKU field	Kyösti Mälkki
2016-05-28	acpi_device: Add support for writing ACPI Device Properties	Duncan Laurie
2016-05-28	acpi_device: Add support for writing ACPI SPI descriptors	Duncan Laurie
2016-05-28	acpi_device: Add support for writing ACPI I2C descriptors	Duncan Laurie