coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2022-07-14	arch/x86: Mark prepare_and_run_postcar noreturn	Arthur Heymans
2022-05-16	arch/x86/postcar_loader.c: Change prepare_and_run_postcar signature	Arthur Heymans
2022-05-16	arch/x86/postcar_loader.c: Reduce the scope of functions	Arthur Heymans
2022-05-16	arch/x86/postcar: Set up postcar MTRR in C code	Arthur Heymans
2022-04-14	x86/mtrr: Print address ranges inclusive to be more consistent	Werner Zeh
2022-03-08	timestamps: Rename timestamps to make names more consistent	Jakub Czapiga
2021-03-16	cbfs: Remove prog_locate() for stages and rmodules	Julius Werner
2021-01-29	stage_cache: Add resume_from_stage_cache()	Kyösti Mälkki
2020-07-14	arch/x86/postcar_loader: Remove unused 'include <cpu/cpu.h>'	Elyes HAOUAS
2020-06-02	arch/x86/postcar_loader: utilize var_mtrr_context API	Aaron Durbin
2020-05-11	treewide: Remove "this file is part of" lines	Patrick Georgi
2020-05-07	arch/x86: unexpose postcar_frame_common_mtrrs()	Aaron Durbin
2020-03-06	src/arch/x86: Convert to SPDX license header	Patrick Georgi
2019-12-19	arch/x86,soc/intel: Drop RESET_ON_INVALID_RAMSTAGE_CACHE	Kyösti Mälkki
2019-11-11	console,boot_state: Exclude printk() from reported times	Kyösti Mälkki
2019-11-05	security/vboot: Removed vboot_prepare from vboot_locator	Wim Vervoorn
2019-10-30	Program loading: Handoff cbmem_top via calling arguments	Arthur Heymans
2019-09-11	arch/x86: Cache the TSEG region at the top of ram	Subrata Banik
2019-09-10	AUTHORS: Move src/arch/x86 copyrights into AUTHORS file	Martin Roth
2019-08-31	arch/x86: Remove WB attribute from 0..CACHE_TMP_RAMTOP	Kyösti Mälkki
2019-08-28	arch/x86/postcar: unexpose postcar_commit_mtrrs() symbol	Aaron Durbin
2019-08-26	soc/intel: Use common romstage code	Kyösti Mälkki
2019-08-22	arch/x86: Add <arch/romstage.h>	Kyösti Mälkki
2019-08-15	arch/x86: Add postcar_frame_common_mtrrs()	Kyösti Mälkki
2019-07-04	arch/x86: Adjust size of postcar stack	Kyösti Mälkki
2019-06-13	stage_cache: Make empty inline function if CONFIG_NO_STAGE_CACHE enable	Subrata Banik
2019-05-22	post_code: add post code for failure to load next stage	Keith Short
2019-03-08	coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX)	Julius Werner
2019-03-07	prog_loader: Associate TS_END_ROMSTAGE timestamp with postcar if exist	Subrata Banik
2018-12-22	arch/x86 cbmem: Drop tests for LATE_CBMEM_INIT	Kyösti Mälkki
2018-11-09	include/program_loading: Add POSTCAR prog type	Philipp Deppenwiese
2018-06-04	arch/x86: Introduce postcar_frame_add_romcache()	Nico Huber
2018-04-24	arch/x86/postcar: add comment clarifying reason for finalize_load()	Aaron Durbin
2017-09-13	arch/x86: Fix typo with MTRR	Kyösti Mälkki
2017-09-08	arch/x86 postcar: Fix use with stage_cache	Kyösti Mälkki
2016-12-09	postcar_loader: Support LATE_CBMEM_INIT boards	Kyösti Mälkki
2016-12-06	CPU: Declare cpu_phys_address_size() for all arch	Kyösti Mälkki
2016-12-01	arch/x86: cache postcar in stage cache	Aaron Durbin
2016-09-12	arch/x86: Utilize additional MTRRs in postcar_frame_add_mtrr	Rizwan Qureshi
2016-09-12	arch/x86: Always compile postcar library in romstage	Rizwan Qureshi
2016-04-02	lib/prog_loading: introduce prog_segment_loaded()	Aaron Durbin
2016-04-02	arch/x86: notify the system when the postcar parameter was updated	Aaron Durbin
2016-03-23	arch/x86: introduce postcar stage/phase	Aaron Durbin