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2011-04-19Recently the 3 projects using the new AMD reference code have beenScott Duplichan
failing the check for globals (or statics) in romstage. This causes ASRock E350M1, AMD Inagua, and AMD Persimmon builds to fail with the message "Do not use global variables in romstage". The message is working as intended. It is detecting data declared as 'static' when 'static const' was intended. The code executes correctly because it never tries to modify the data. To make reference code updates easy, it is probably best to avoid modifying the AMD provided code if possible. The following change bypasses the "Do not use global variables in romstage" check for the AMD reference code only. Signed-off-by: Scott Duplichan <scott@notabs.org> Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6516 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-04-16bootblock updates: ↵Stefan Reinauer
- allow CPU to define bootblock code, too. - drop unneeded __PRE_RAM__ define - move CBFS specific code out of bootblock_common.h into cbfs.h Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Acked-by: Marc Jones <marcj303@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6507 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-04-15comment cosmetics in bootblock.ldStefan Reinauer
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6505 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-04-14- drop remaining CONFIG_ROM_IMAGE_SIZEStefan Reinauer
- re-enable .data section check for bootblock. - rename ldscript_fallback_cbfs.lb to bootblock.ld Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6497 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-04-11Unify use of post_codeAlexandru Gagniuc
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6487 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-03-08Move cmos.default handling to bootblockPatrick Georgi
The cmos.default code wasn't actually used so far, due to an oversight when forward-porting this feature from an old branch. - Extend walkcbfs' use by factoring out the stage handling into C code. - New sanitize_cmos() function that looks if CMOS data is invalid and cmos.default exists and if so overwrites CMOS with cmos.default data. - Use sanitize_cmos() in both bootblock implementations. - Drop the need to reboot after writing CMOS: CMOS wasn't used so far, so we can go on without a reboot. - Remove the restriction that cmos.default only works on CAR boards. - Always build in cmos.default support on boards that USE_OPTION_TABLE. Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com> Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6436 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-02-14This code fixes a number of build issues related to the AMD Agesa code. The ↵Frank Vibrans
particular issues are global variables existing in romstage and the use of GCC intrinsics in the build. The former issue will be addressed shortly, and the latter issue requires community assistance. This code is dependent on the AMD Family 14h mainboard code. Signed-off-by: Frank Vibrans <frank.vibrans@amd.com> Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Acked-by: Marc Jones <marcj303@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6348 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-12-11After this has been brought up many times before, rename src/arch/i386 toStefan Reinauer
src/arch/x86. Signed-off-by: Stefan Reinauer <stepan@coreboot.org> Acked-by: Patrick Georgi <patrick@georgi-clan.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6161 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1