index
:
coreboot.git
macbookair5_2
macbookpro10_1
main
master
mbp101_medisable
mbp101_medisable_1
mbp82
x230
my copy of coreboot
User &
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
src
/
arch
/
riscv
/
trap_handler.c
Age
Commit message (
Expand
)
Author
2016-10-18
arch/riscv: In trap handler, don't print SP twice
Jonathan Neuschäfer
2016-10-15
arch/riscv: Visually align trap frame information
Jonathan Neuschäfer
2016-10-15
riscv and power8: Convert printk/while(1) to die
Jonathan Neuschäfer
2016-08-29
arch/riscv: Add missing "break;"
Jonathan Neuschäfer
2016-08-23
arch/riscv: Implement the SBI again
Jonathan Neuschäfer
2016-08-23
arch/riscv: Fix unaligned memory access emulation
Jonathan Neuschäfer
2016-08-15
arch/riscv: Improve and refactor trap handling diagnostics
Jonathan Neuschäfer
2016-07-19
arch/riscv: Enable unaligned load handling
Jonathan Neuschäfer
2016-06-28
arch/riscv: Show fault PC and load address on load access faults
Jonathan Neuschäfer
2016-02-19
RISC-V: Add more debug info to debug printks
Andrew Waterman
2016-02-19
RISC-V: Make inline asm usage safer
Andrew Waterman
2015-10-31
tree: drop last paragraph of GPL copyright header
Patrick Georgi
2015-09-15
riscv-trap-handling: Add functionality, prevent stack corruption
Thaminda Edirisooriya
2015-09-10
riscv-trap-handling: Add implementation for trap calls in riscv
Thaminda Edirisooriya