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path: root/src/arch/riscv/include
AgeCommit message (Expand)Author
2015-10-31tree: drop last paragraph of GPL copyright headerPatrick Georgi
2015-09-16riscv-memlayout: fix existing memlayout issues, add sbi interfaceThaminda Edirisooriya
2015-09-15riscv-trap-handling: Add functionality, prevent stack corruptionThaminda Edirisooriya
2015-09-10riscv-trap-handling: Add implementation for trap calls in riscvThaminda Edirisooriya
2015-09-10riscv-virtual-memory: Add virtual memory setupThaminda Edirisooriya
2015-08-26riscv-trap-handling: Add preliminary trap handling for riscvThaminda Edirisooriya
2015-08-09riscv-spike: support for Spike emulation of riscvThaminda Edirisooriya
2015-06-08Remove empty lines at end of fileElyes HAOUAS
2015-05-21Remove address from GPLv2 headersPatrick Georgi
2015-04-21Unify byte order macros and clrsetbitsJulius Werner
2015-04-06New mechanism to define SRAM/memory map with automatic bounds checkingJulius Werner
2015-02-02src/arch/*/include/stdint.h: Provide definitions for bool typeAlexandru Gagniuc
2015-01-27CBMEM: Tidy up CAR migrationKyösti Mälkki
2015-01-27CBMEM console: Fix CAR migration stepKyösti Mälkki
2014-12-01Add UCB RISCV support for architecture, soc, and emulation mainboard..Ronald G. Minnich