coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2016-10-24	RISCV: Clean up the common architectural code	Ronald G. Minnich
2016-08-23	arch/riscv: Implement the SBI again	Jonathan Neuschäfer
2016-07-28	arch/riscv: Refactor bootblock.S	Jonathan Neuschäfer
2016-07-14	spike-riscv: Look for the CBFS in RAM	Jonathan Neuschäfer
2016-06-12	arch/riscv: Compile with -mcmodel=medany	Jonathan Neuschäfer
2016-06-12	arch/riscv: Add misc.c to bootblock/romstage to get udelay()	Jonathan Neuschäfer
2016-05-03	build system: remove CBFSTOOL_PRE1_OPTS	Patrick Georgi
2016-03-09	Makefile: Add build-time overlap check for programs loaded after coreboot	Julius Werner
2016-01-28	Makefile: Make full use of src-to-obj macro	Nico Huber
2015-12-02	build system: Add more files through cbfs-files instead of manual rules	Patrick Georgi
2015-10-31	tree: drop last paragraph of GPL copyright header	Patrick Georgi
2015-09-16	riscv-memlayout: fix existing memlayout issues, add sbi interface	Thaminda Edirisooriya
2015-09-10	riscv-trap-handling: Add implementation for trap calls in riscv	Thaminda Edirisooriya
2015-09-09	linking: add and use LDFLAGS_common	Aaron Durbin
2015-07-22	riscv: Link in libgcc	Patrick Georgi
2015-05-21	Remove address from GPLv2 headers	Patrick Georgi
2015-05-20	build system: use archives, not linker action to shorten command lines	Patrick Georgi
2015-04-14	CBFS: Automate ROM image layout and remove hardcoded offsets	Julius Werner
2015-04-14	CBFS: Correct ROM_SIZE for ARM boards, use CBFS_SIZE for cbfstool	Julius Werner
2015-04-06	New mechanism to define SRAM/memory map with automatic bounds checking	Julius Werner
2015-04-06	build system: run linker scripts through the preprocessor	Patrick Georgi
2015-04-04	build system x86: deprecate bootblock_lds and ldscripts variables	Patrick Georgi
2015-04-03	program loading: add prog_run() function	Aaron Durbin
2014-12-05	RISCV: one last little nit to make it build and run	Ronald G. Minnich
2014-12-04	RISCV: get RISCV to build again	Ronald G. Minnich
2014-12-01	Add UCB RISCV support for architecture, soc, and emulation mainboard..	Ronald G. Minnich