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path: root/src/arch/riscv/Makefile.inc
AgeCommit message (Expand)Author
2023-11-13arch/x86/riscv: Use 'all' target to include files in all stagesArthur Heymans
2023-06-11arch/riscv: Always build opensbi with GCCArthur Heymans
2023-04-21arch/riscv: Fix compiler argument for clangArthur Heymans
2022-09-17riscv: Enable the newfangled way of selecting instruction setsPatrick Georgi
2021-09-19arch/riscv: Avoid gcc11 replacing memset implementation with memset callPatrick Georgi
2020-06-13treewide: Add Kconfig variable MEMLAYOUT_LD_FILEFurquan Shaikh
2020-05-18src: Remove leading blank lines from SPDX headerElyes HAOUAS
2020-05-11treewide: Remove "this file is part of" linesPatrick Georgi
2020-03-06src/arch/riscv: Convert to SPDX license headerPatrick Georgi
2019-11-06arch/riscv: Rename `stages.c` to `romstage.c`Nico Huber
2019-11-05arch/riscv: Don't link `stages.c` into ramstageNico Huber
2019-08-08arch/riscv: Enable FIT supportJonathan Neuschäfer
2019-08-03riscv: add support for OpenSBIXiang Wang
2019-02-13riscv: Add initial support for 32bit boardsPhilipp Hug
2019-02-02riscv: Simplify payload handlingXiang Wang
2019-01-17riscv: create Kconfig architecture features for new partsRonald G. Minnich
2018-11-05riscv: add support for supervisor binary interface (SBI)Xiang Wang
2018-11-05riscv: add support smp_pause / smp_resumeXiang Wang
2018-10-11riscv: add physical memory protection (PMP) supportXiang Wang
2018-10-04arch/riscv: Adjust compiler flags for scan-buildJonathan Neuschäfer
2018-09-14arch/riscv: provide a monotonic timerPhilipp Hug
2018-09-10riscv: update misaligned memory access exception handlingXiang Wang
2018-09-05riscv: add entry assembly file for RAMSTAGEXiang Wang
2018-08-01riscv: remove redundancy in MakefileXiang Wang
2018-07-31riscv: fix issues (timestrap & PRIu64)Xiang Wang
2018-07-18arch/riscv: Fix makefile to only set flags for riscvMartin Roth
2018-07-17riscv: add support for modifying compiler optionsXiang Wang
2018-02-20arch/riscv: Make RVC support configurableJonathan Neuschäfer
2017-12-02riscv: Remove config string supportJonathan Neuschäfer
2017-12-02arch/riscv: Remove the current SBI implementationJonathan Neuschäfer
2016-11-12riscv: start to use the configstring functionsRonald G. Minnich
2016-11-07riscv: Unify SBI call implementations under arch/riscv/Jonathan Neuschäfer
2016-10-24RISCV: Clean up the common architectural codeRonald G. Minnich
2016-08-23arch/riscv: Implement the SBI againJonathan Neuschäfer
2016-07-28arch/riscv: Refactor bootblock.SJonathan Neuschäfer
2016-07-14spike-riscv: Look for the CBFS in RAMJonathan Neuschäfer
2016-06-12arch/riscv: Compile with -mcmodel=medanyJonathan Neuschäfer
2016-06-12arch/riscv: Add misc.c to bootblock/romstage to get udelay()Jonathan Neuschäfer
2016-05-03build system: remove CBFSTOOL_PRE1_OPTSPatrick Georgi
2016-03-09Makefile: Add build-time overlap check for programs loaded after corebootJulius Werner
2016-01-28Makefile: Make full use of src-to-obj macroNico Huber
2015-12-02build system: Add more files through cbfs-files instead of manual rulesPatrick Georgi
2015-10-31tree: drop last paragraph of GPL copyright headerPatrick Georgi
2015-09-16riscv-memlayout: fix existing memlayout issues, add sbi interfaceThaminda Edirisooriya
2015-09-10riscv-trap-handling: Add implementation for trap calls in riscvThaminda Edirisooriya
2015-09-09linking: add and use LDFLAGS_commonAaron Durbin
2015-07-22riscv: Link in libgccPatrick Georgi
2015-05-21Remove address from GPLv2 headersPatrick Georgi
2015-05-20build system: use archives, not linker action to shorten command linesPatrick Georgi
2015-04-14CBFS: Automate ROM image layout and remove hardcoded offsetsJulius Werner
2015-04-14CBFS: Correct ROM_SIZE for ARM boards, use CBFS_SIZE for cbfstoolJulius Werner
2015-04-06New mechanism to define SRAM/memory map with automatic bounds checkingJulius Werner
2015-04-06build system: run linker scripts through the preprocessorPatrick Georgi
2015-04-04build system x86: deprecate bootblock_lds and ldscripts variablesPatrick Georgi
2015-04-03program loading: add prog_run() functionAaron Durbin
2014-12-05RISCV: one last little nit to make it build and runRonald G. Minnich
2014-12-04RISCV: get RISCV to build againRonald G. Minnich
2014-12-01Add UCB RISCV support for architecture, soc, and emulation mainboard..Ronald G. Minnich