coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2024-08-06	Kconfig: Reverse ARCH_SUPPORTS_CLANG	Arthur Heymans
2024-03-22	arch/riscv: add Kconfig variable RISCV_SOC_HAS_MENVCFG	Ronald G Minnich
2024-02-18	arch to cpu: Add SPDX license headers to Kconfig files	Martin Roth
2024-02-07	arch/riscv: Add OPENSBI_FW_DYNAMIC_BOOT_HART option	Maximilian Brune
2023-06-11	arch/riscv: Add clang as supported architecture	Arthur Heymans
2019-11-25	Kconfig: Drop the C_ENVIRONMENT_BOOTBLOCK symbol	Arthur Heymans
2019-11-10	lib/Kconfig: Remove RAMSTAGE_CBMEM_TOP_ARG	Arthur Heymans
2019-11-10	arch/riscv: Pass cbmem_top to ramstage via calling argument	Arthur Heymans
2019-08-03	riscv: add support for OpenSBI	Xiang Wang
2019-07-02	arch/riscv: Make RISCV specific options depend on ARCH_RISCV	Arthur Heymans
2019-06-04	arch/riscv/Kconfig: Make correct default value for CONFIG_ARCH_RISCV_M	Subrata Banik
2019-01-24	riscv: ARCH_RISCV_RV{32,64} selects ARCH_RISCV	Ronald G. Minnich
2019-01-17	riscv: create Kconfig architecture features for new parts	Ronald G. Minnich
2018-12-07	riscv: fix non-SMP support	Philipp Hug
2018-11-05	riscv: add support smp_pause / smp_resume	Xiang Wang
2018-09-14	arch/riscv: provide a monotonic timer	Philipp Hug
2018-07-17	riscv: add support for modifying compiler options	Xiang Wang
2018-02-20	arch/riscv: Make RVC support configurable	Jonathan Neuschäfer
2017-12-02	riscv: Remove config string support	Jonathan Neuschäfer
2016-11-12	riscv: start to use the configstring functions	Ronald G. Minnich
2016-10-15	riscv: Use the generic src/lib/bootblock.c	Jonathan Neuschäfer
2016-01-21	console: Simplify bootblock console Kconfig selection logic	Alexandru Gagniuc
2015-11-11	arm/arm64: Generalize bootblock C entry point	Julius Werner
2015-05-19	Remove Kconfig variable that has no effect	Patrick Georgi
2015-05-19	Remove Kconfig variable that has no effect	Patrick Georgi
2015-04-07	kconfig: drop intermittend forwarder files	Stefan Reinauer
2015-01-27	vboot2: add verstage	Stefan Reinauer
2014-12-01	Add UCB RISCV support for architecture, soc, and emulation mainboard..	Ronald G. Minnich