Age | Commit message (Collapse) | Author |
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It's basically done with the following script and some manual fixup:
VARS=`grep ^define src/config/Options.lb | cut -f2 -d\ | grep -v ^CONFIG | grep -v ^COREBOOT |grep -v ^CC`
for VAR in $VARS; do
find . -name .svn -prune -o -type f -exec perl -pi -e "s/(^|[^0-9a-zA-Z_]+)$VAR($|[^0-9a-zA-Z_]+)/\1CONFIG_$VAR\2/g" {} \;
done
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4381 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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targets.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4014 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Due to the automatic nature of this update, I am self-acking. It worked in
abuild.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3053 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2083 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2082 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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ram linuxbios_ram instead of linuxbios_c and linuxbios_payload...
- Reordered the linker sections so the LinuxBIOS fallback image can take more the 64KiB on x86
- ROM_IMAGE_SIZE now will work when it is specified as larger than 64KiB.
- Tweaked the reset16.inc and reset16.lds to move the sanity check to see if everything will work.
- Start using romcc's built in preprocessor (This will simplify header compiler checks)
- Add helper functions for examining all of the resources
- Remove debug strings from chip.h
- Add llshell to src/arch/i386/llshell (Sometime later I can try it...)
- Add the ability to catch exceptions on x86
- Add gdb_stub support to x86
- Removed old cpu options
- Added an option so we can detect movnti support
- Remove some duplicate definitions from pci_ids.h
- Remove the 64bit resource code in amdk8/northbridge.c in preparation for making it generic
- Minor romcc bug fixes
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1727 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1571 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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