Age | Commit message (Expand) | Author |
2019-09-09 | arch/x86: Refactor CAR_GLOBAL quirk for FSP1.0 | Kyösti Mälkki |
2019-08-27 | AUTHORS: Move src/arch/mips copyrights into AUTHORS file | Martin Roth |
2019-08-20 | arch/non-x86: Remove use of __PRE_RAM__ | Kyösti Mälkki |
2019-07-12 | arch, include, soc: Use common stdint.h | Jacob Garber |
2019-03-22 | arch/mips: Fix <arch/mmio.h> prototypes | Kyösti Mälkki |
2019-03-04 | arch/io.h: Separate MMIO and PNP ops | Kyösti Mälkki |
2019-01-04 | src: Move {pci,pnp}_devfn_t to common 'device/pci_type.h' | Elyes HAOUAS |
2019-01-04 | src: Get rid of device_t | Elyes HAOUAS |
2018-10-08 | Move compiler.h to commonlib | Nico Huber |
2018-09-21 | arch/{mips,power8}/include/arch: Don't use device_t | Elyes HAOUAS |
2018-09-14 | complier.h: add __always_inline and use it in code base | Aaron Durbin |
2018-08-07 | arch: Retire cache_sync_instructions() from <arch/cache.h> (except arm) | Julius Werner |
2018-05-14 | pci: Fix compilation on non x86 | Patrick Rudolph |
2017-11-23 | Constify struct cpu_device_id instances | Jonathan Neuschäfer |
2017-05-30 | arch: Unify basic cache clearing API | Julius Werner |
2016-05-02 | lib/coreboot_table: use the architecture dependent table size | Aaron Durbin |
2016-05-02 | arch: introduce architecture dependent common variables | Aaron Durbin |
2016-02-11 | arches: lib: add main_decl.h for main() declaration | Aaron Durbin |
2016-02-11 | arch: remove stage_exit() | Aaron Durbin |
2015-12-31 | imgtec/pistachio: Add SOC_REGISTERS memory region | Ionela Voinescu |
2015-12-29 | mips: add coherency argument to identity mapping | Ionela Voinescu |
2015-11-11 | arm/arm64: Generalize bootblock C entry point | Julius Werner |
2015-10-31 | tree: drop last paragraph of GPL copyright header | Patrick Georgi |
2015-07-29 | arm, arm64, mips: Add rough static stack size checks with -Wstack-usage | Julius Werner |
2015-05-21 | Remove address from GPLv2 headers | Patrick Georgi |
2015-04-21 | Unify byte order macros and clrsetbits | Julius Werner |
2015-04-21 | arch/mips: simplify cache operations | Ionela Voinescu |
2015-04-21 | mips: Allow memory to be identity mapped in the TLB | Andrew Bresticker |
2015-04-17 | arch/mips: Fix bug when performing cache operations | Ionela Voinescu |
2015-04-13 | arch/mips: provide proper cache primitives | Ionela Voinescu |
2015-04-13 | urara: add support for DMA coherent memory area | Ionela Voinescu |
2015-04-07 | mips: add c0 register access plumbing | Vadim Bendebury |
2015-04-06 | New mechanism to define SRAM/memory map with automatic bounds checking | Julius Werner |
2015-03-30 | mips: bring payload execution to current standards | Patrick Georgi |
2015-03-28 | mips: fix API expectations that break builds | Aaron Durbin |
2015-03-21 | arch/mips: Add base MIPS architecture support | Paul Burton |