coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2015-10-31	tree: drop last paragraph of GPL copyright header	Patrick Georgi
2015-07-29	arm, arm64, mips: Add rough static stack size checks with -Wstack-usage	Julius Werner
2015-05-21	Remove address from GPLv2 headers	Patrick Georgi
2015-04-21	Unify byte order macros and clrsetbits	Julius Werner
2015-04-21	arch/mips: simplify cache operations	Ionela Voinescu
2015-04-21	mips: Allow memory to be identity mapped in the TLB	Andrew Bresticker
2015-04-17	arch/mips: Fix bug when performing cache operations	Ionela Voinescu
2015-04-13	arch/mips: provide proper cache primitives	Ionela Voinescu
2015-04-13	urara: add support for DMA coherent memory area	Ionela Voinescu
2015-04-07	mips: add c0 register access plumbing	Vadim Bendebury
2015-04-06	New mechanism to define SRAM/memory map with automatic bounds checking	Julius Werner
2015-03-30	mips: bring payload execution to current standards	Patrick Georgi
2015-03-28	mips: fix API expectations that break builds	Aaron Durbin
2015-03-21	arch/mips: Add base MIPS architecture support	Paul Burton