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2013-01-22armv7: add ARM-encoded bootblock_exit() stubDavid Hendricks
This replaces the call() function with a stub which is compiled separately using -marm. See http://review.coreboot.org/#/c/2175/ for details. Change-Id: I7f8c45b5e63ec97b0a82294488129d1c97ec0cbf Signed-off-by: David Hendricks <dhendrix@chromium.org> Reviewed-on: http://review.coreboot.org/2180 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-01-19armv7/snow: get to romstageDavid Hendricks
This patch does a few things to get us into romstage: - Add romstage as a stage (a later patch adds it as a binary, which is probably wrong). The Makefile magic is complex enough that we let it build the XIP file for now, but we no longer use it. - Replace findstage with loadstage. Loadstage will find a stage, load the code to memory, and zero the remaining part of memory. Now we can link the romstage to go anywhere! - Eliminate magic offsets from code/ldscripts and centralize Kconfig variables in src/cpu/samsung/exynos5250/Kconfig. - Tidy up code and serial output Change-Id: Iae4d2f9e7f429cb1df15d49daf9a08b88d75d79d Signed-off-by: David Hendricks <dhendrix@chromium.org> Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Reviewed-on: http://review.coreboot.org/2174 Tested-by: build bot (Jenkins)
2013-01-18armv7: add a wrapper for romstage's main() for ARM ISAGabe Black
This adds a wrapper around main() in romstage which is compiled using -marm. This assumes that the bootblock branches to romstage in ARM mode. The long-term idea is to enforce ABI compatibility when handing off to the next stage by using shims which are which are compiled in a pre- determiend manner and leave the main portions of each stage up to whatever the compiler wants. So it will eventually look like this: 1. bootblock_main (ARM/Thumb) 2. bootblock_exit (ARM) 3. romstage_entry (ARM) 4. romstage_main (ARM/Thumb) (credit to Gabe Black for writing the patch, I'm just uploading it) Change-Id: I4fdb8d2c6c2c0a7178bcb9154c378ddce0567309 Signed-off-by: David Hendricks <dhendrix@chromium.org> Signed-off-by: Gabe Black <gabeblack@chromium.org> Reviewed-on: http://review.coreboot.org/2175 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-01-18Snow bootblock (bloated/debug version)David Hendricks
This is the bloated Snow bootblock which includes: - SPI driver - UART, including requisite I2C, Maxim PMIC, and clock config code. - Adjustments for magic offsets (id section, stack pointer address) This is just a temporary solution until we have romstage loading. Once that happens, we'll rip out all but the code necessary for copying SPI ROM content into SRAM. Change-Id: I2a11e272eb9b6f626b5d9783eabb4a720a1d06be Signed-off-by: David Hendricks <dhendrix@chromium.org> Reviewed-on: http://review.coreboot.org/2170 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-01-17Fix the stack setup code so we can use an arbitrary 32-bit valueRonald G. Minnich
We've had obscure errors as the size of the bootblock changes. This fix allows us to use a 32-bit constant. Please test on real hardware before you ack. Change-Id: Ic3d9f4763554bd6104ae9c4ce5bbacd17b40872c Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Reviewed-on: http://review.coreboot.org/2168 Reviewed-by: David Hendricks <dhendrix@chromium.org> Tested-by: build bot (Jenkins)
2013-01-17make main() in snow's romstage.c our romstage entry pointDavid Hendricks
Our earlier attempt was jumping straight from asm to the old u-boot board_init_f in lowlevel_init_c.c. We are getting ready to transition to using a real bootblock for ARM, so add romstage.c to the files compiled and we'll make main() our entry point. This also updates romstage.ld to place main() (*(.text.startup)) at the beginning of romstage. Change-Id: Ifc77a6bfba27d915c4cad62c6c8040665294628a Signed-off-by: David Hendricks <dhendrix@chromium.org> Reviewed-on: http://review.coreboot.org/2163 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-01-17armv7: Place reset vector + CBFS header + bootblock dynamicallyDavid Hendricks
This replaces hard-coded bootblock offsets using the new scheme. The assembler will place the initial branch instruction after BL1, skip 2 aligned chunks, and place the remaining bootblock code after. It will also leave an anchor string, currently 0xdeadbeef which cbfstool will find. Once found, cbfstool will place the master CBFS header at the next aligned offset. Here is how it looks: 0x0000 |--------------| | BL1 | 0x2000 |--------------| | branch | 0x2000 + align |--------------| | CBFS header | 0x2000 + align * 2 |--------------| | bootblock | |--------------| TODO: The option for alignment passed into cbfstool has always been 64. Can we set it to 16 instead? Change-Id: Icbe817cbd8a37f11990aaf060aab77d2dc113cb1 Signed-off-by: David Hendricks <dhendrix@chromium.org> Reviewed-on: http://review.coreboot.org/2148 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-01-17ARM bootblock approachDavid Hendricks
This lays out the groundwork for using a proper bootblock on ARM. Currently we bypass the bootblock entirely and go straight to romstage. However we want to utilize CBFS to maximize flexibility of placing code without relying on a lot of magic numbers which will break depending on the SoC in use. Change-Id: I9cc2a8191d2db38b27b6363ba673e5a360de9684 Signed-off-by: Stefan Reinauer <reinauer@google.com> Signed-off-by: David Hendricks <dhendrix@chromium.org> Reviewed-on: http://review.coreboot.org/2118 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-01-16armv7: delete unneeded ptrace.hStefan Reinauer
... and delete traces in source files. Change-Id: Ie0f70a479f1eadadc654a41fa3c426d1d4ac2f2b Signed-off-by: Stefan Reinauer <reinauer@google.com> Reviewed-on: http://review.coreboot.org/2152 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-01-12Implement GCC code coverage analysisStefan Reinauer
In order to provide some insight on what code is executed during coreboot's run time and how well our test scenarios work, this adds code coverage support to coreboot's ram stage. This should be easily adaptable for payloads, and maybe even romstage. See http://gcc.gnu.org/onlinedocs/gcc/Gcov.html for more information. To instrument coreboot, select CONFIG_COVERAGE ("Code coverage support") in Kconfig, and recompile coreboot. coreboot will then store its code coverage information into CBMEM, if possible. Then, run "cbmem -CV" as root on the target system running the instrumented coreboot binary. This will create a whole bunch of .gcda files that contain coverage information. Tar them up, copy them to your build system machine, and untar them. Then you can use your favorite coverage utility (gcov, lcov, ...) to visualize code coverage. For a sneak peak of what will expect you, please take a look at http://www.coreboot.org/~stepan/coreboot-coverage/ Change-Id: Ib287d8309878a1f5c4be770c38b1bc0bb3aa6ec7 Signed-off-by: Stefan Reinauer <reinauer@google.com> Reviewed-on: http://review.coreboot.org/2052 Tested-by: build bot (Jenkins) Reviewed-by: David Hendricks <dhendrix@chromium.org> Reviewed-by: Martin Roth <martin@se-eng.com> Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-01-12Move init.S to a proper filenameRonald G. Minnich
Also, remove unnecessary junk and prepare for future build changes. Change-Id: I143777ec7e67ea4d6fed00084aafcb94c7866b4d Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Reviewed-on: http://review.coreboot.org/2141 Reviewed-by: David Hendricks <dhendrix@chromium.org> Tested-by: build bot (Jenkins)
2013-01-11cbmem: replace pointer type by uint64_tStefan Reinauer
Since coreboot is compiled into 32bit code, and userspace might be 32 or 64bit, putting a pointer into the coreboot table is not viable. Instead, use a uint64_t, which is always big enough for a pointer, even if we decide to move to a 64bit coreboot at some point. Change-Id: Ic974cdcbc9b95126dd1e07125f3e9dce104545f5 Signed-off-by: Stefan Reinauer <reinauer@google.com> Reviewed-on: http://review.coreboot.org/2135 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-01-10armv7: replace magic constant for romstage locationDavid Hendricks
This replaces 0x02023400 with an SoC-specific Kconfig variable. Change-Id: I21482d54a1e1fa6c4437c030ddae2b0bb3331551 Signed-off-by: David Hendricks <dhendrix@chromium.org> Reviewed-on: http://review.coreboot.org/2130 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-01-10armv7: add *(.data) back into .romdata sectionDavid Hendricks
This doesn't seem to be strictly required (so far), but makes sense. Change-Id: I18416c427ff886507ae09c7fc1a018baf94af24a Signed-off-by: David Hendricks <dhendrix@chromium.org> Reviewed-on: http://review.coreboot.org/2131 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-01-10armv7: update board_init_f function signatureDavid Hendricks
We don't pass arguments when we jump out of assembly code. Change-Id: Iccf3a6f713e260b08f9ff47e8b542b9e96369166 Signed-off-by: David Hendricks <dhendrix@chromium.org> Reviewed-on: http://review.coreboot.org/2122 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-01-10armv7: delete some unused filesDavid Hendricks
Change-Id: I4601b97cbd7dbfb6ee742b3920d2aac4ac49b958 Signed-off-by: David Hendricks <dhendrix@chromium.org> Reviewed-on: http://review.coreboot.org/2121 Tested-by: build bot (Jenkins) Reviewed-by: Hung-Te Lin <hungte@chromium.org>
2013-01-05ARMv7: drop __ASSEMBLY__Stefan Reinauer
We moved to using __ASSEMBLER__ years ago since it is set by as. Change-Id: I60103ba23ebe87be1d0bc63beed0ef5b05eed4f2 Signed-off-by: Stefan Reinauer <reinauer@google.com> Reviewed-on: http://review.coreboot.org/2111 Reviewed-by: Ronald G. Minnich <rminnich@gmail.com> Tested-by: build bot (Jenkins)
2013-01-05ARMv7: drop __KERNEL__Stefan Reinauer
It's a bad Linux heritage.. We have no userland in firmware. Change-Id: Ib19e5ba713078ca37514571213d19f418417b964 Signed-off-by: Stefan Reinauer <reinauer@google.com> Reviewed-on: http://review.coreboot.org/2108 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-01-04Flatten the treeRonald G. Minnich
It makes no sense to have directories with one file. Change-Id: I65ba93dda5e6a4bcc5a7cc049c1378ebf5d6abcd Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Reviewed-on: http://review.coreboot.org/2105 Tested-by: build bot (Jenkins) Reviewed-by: David Hendricks <dhendrix@chromium.org>
2013-01-04Revert "armv7: pass bootblock offset from Kconfig into cbfstool"Ronald G. Minnich
This reverts commit ec8d35fe911ab35a5f40fd5b452f5463857b244a We are almost certain that this is not necessary. Change-Id: I70e94f883be95655da00a0b127ed9ffd7c81c63b Reviewed-on: http://review.coreboot.org/2104 Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-by: David Hendricks <dhendrix@chromium.org> Tested-by: build bot (Jenkins)
2013-01-04ARMv7: Make ABI compatible to reference toolchainStefan Reinauer
Our reference toolchain uses -mabi=aapcs whereas we started forcing -mabi=aapcs-linux. Drop this to prevent ABI incompatibility. Also drop -fno-common since that's set in the top level Makefile.inc already. Change-Id: I4afdcf5da9a5d86c2f9e5de5c7d523ccd2f5f1e0 Signed-off-by: Stefan Reinauer <reinauer@google.com> Reviewed-on: http://review.coreboot.org/2103 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-01-04ARMv7: drop libgcc copyStefan Reinauer
We accidently checked in some files from libgcc as well as a Makefile from u-boot and a duplicate implementation of div0. Drop all those files to reduce the confusion. Change-Id: I8ff6eabbced6f663813f8cc55f19c81839d03477 Signed-off-by: Stefan Reinauer <reinauer@google.com> Reviewed-on: http://review.coreboot.org/2102 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-01-04Clean up ARMv7 architecture KconfigStefan Reinauer
There was a misuse of bool that would cause the dcache policy to not be set up correctly, but instead present options "y" and "n" in the Kconfig menu. Also, TINY_BOOTBLOCK was removed a while ago, everything is TINY_BOOTBLOCK now. Hence remove the option. Change-Id: I5c28ac828955c69614c7bdaf106f79db51e68723 Signed-off-by: Stefan Reinauer <reinauer@google.com> Reviewed-on: http://review.coreboot.org/2101 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-01-04update CFLAGS for armv7David Hendricks
This updates $CFLAGS used for armv7. Most of them were just added to be consistent with what u-boot does. The important ones here are -march=armv7-a and -mthumb (to allow 16-bit Thumb instructions). I removed the hard float support because it got errors and coreboot should never use floats anyway. We're still having trouble with enums but I want to see how far it gets with this patch. Also, put the flags in a form that makes diffs easier to read. It's almost impossible otherwise. Finally, move some flags to the architecture Makefile, and rely on the fact that some are set for all architectures. Depends-On: I6f730d017391f9ec4401cdfd34931c869df10a9e Change-Id: Ia8a1ae22959933e06f7b996d1832cea40819f1ff Signed-off-by: David Hendricks <dhendrix@chromium.org> Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Reviewed-on: http://review.coreboot.org/2075 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2013-01-03armv7: pass bootblock offset from Kconfig into cbfstoolDavid Hendricks
This replaces a somewhat useless calculation used earlier (which always evaluated to 0) with an offset to specify the location of the Coreboot bootblock. Change-Id: Ib85aaccf138cebeb6bf8aedf82308861206dff48 Signed-off-by: David Hendricks <dhendrix@chromium.org> Reviewed-on: http://review.coreboot.org/2094 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-01-03armv7: create init.S for early ARMv7 initDavid Hendricks
The old start.S file did a lot of work and had AP-specific #ifndef's. The new init.S will eventually contain only bare minimum generic ARM code for use by the bootblock. Processor-specific stuff and things that take place later in the boot process should go elsewhere. Change-Id: I7db0a77ee4bbad1ddecb193ea125d8941a50532b Signed-off-by: David Hendricks <dhendrix@chromium.org> Reviewed-on: http://review.coreboot.org/2083 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2012-12-29remove obsolete include paths from INCLUDESDavid Hendricks
Change-Id: I621fd49b1f1b96ef388c61ff1abc2130ad2163a5 Signed-off-by: David Hendricks <dhendrix@chromium.org> Reviewed-on: http://review.coreboot.org/2082 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2012-12-29Simplify romstage.ld for armv7David Hendricks
This is still a work-in-progress, but it seems to work better than before and is less complicated... Change-Id: I6f730d017391f9ec4401cdfd34931c869df10a9e Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Signed-off-by: David Hendricks <dhendrix@chromium.org> Reviewed-on: http://review.coreboot.org/2041 Tested-by: build bot (Jenkins)
2012-12-19Remove colors from build system outputPatrick Georgi
While "payload none" is undesirable for instant flashing, assume that it was a conscious user choice. (more immediate: jenkins isn't happy with escape sequences) Change-Id: I9958b34a037b4d10bb7dba893335a63917623a70 Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-on: http://review.coreboot.org/2055 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2012-12-12Fix ARMv7 payload handlingStefan Reinauer
cbfstool was called with the wrong parameters Change-Id: I405d0fd7c84b46da3c98a36fd19ef0034dc175cf Signed-off-by: Stefan Reinauer <reinauer@google.com> Reviewed-on: http://review.coreboot.org/2022 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2012-12-08WIP: Initial ARMv7 architecture implementation in corebootStefan Reinauer
The first ARMv7 CPU we're going to support is the Exynos 5250 used in the Google Snow ChromeBook. Change-Id: I4de8433bbc6202eb8fef2556a11186a3376d411b Signed-off-by: David Hendricks <dhendrix@chromium.org> Signed-off-by: Stefan Reinauer <reinauer@google.com> Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Reviewed-on: http://review.coreboot.org/2004 Tested-by: build bot (Jenkins)
2012-12-06Unify assembler function handlingStefan Reinauer
Instead of adding regparm(0) to each assembler function called by coreboot, add an asmlinkage macro (like the Linux kernel does) that can be different per architecture (and that is empty on ARM right now) Change-Id: I7ad10c463f6c552f1201f77ae24ed354ac48e2d9 Signed-off-by: Stefan Reinauer <reinauer@google.com> Reviewed-on: http://review.coreboot.org/1973 Reviewed-by: David Hendricks <dhendrix@chromium.org> Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2012-11-30Add dummy Kconfig options for armv7David Hendricks
This adds a dummy config for ARMV7 for developing various follow-up patches which rely on ARCH_ARMV7. Change-Id: Id913054d916f41607d10ebc02aaf74082e14b554 Signed-off-by: Hung-Te Lin <hungte@chromium.org> Signed-off-by: David Hendricks <dhendrix@chromium.org> Reviewed-on: http://review.coreboot.org/1939 Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Tested-by: build bot (Jenkins)
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