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This updates the SPD utility and generated SPDs for LP5X to use memory
type code 0x15 (LPDDR5X) instead of 0x13 (LPDDR5). This is done based on
Intel Tech Advisory Doc ID #616599 dated May 2022, page 15.
SPDs were regenerated with:
"util/spd_tools/bin/spd_gen spd/lp5/memory_parts.json lp5"
This only affects the SPDs for 2 memory parts for Intel SoCs and the
only board referencing these is rex.
BUG=b:242765117
TEST=inspected SPD hex dump
Change-Id: Iadb4688f1cb4265dab1dc7c242f0c301d5498b83
Signed-off-by: Caveh Jalali <caveh@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/67265
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Reviewed-by: Reka Norman <rekanorman@chromium.org>
Reviewed-by: Martin Roth <martin.roth@amd.corp-partner.google.com>
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Update K3KL8L80CM-MGCT, K3KL9L90CM-MGCT,H58G66AK6BX070 support
BRANCH=None
BUG=b:243337816
TEST= SPD add
Signed-off-by: EricKY Cheng <ericky_cheng@compal.corp-partner.google.com>
Change-Id: I2c370fbd007c22b1f94074d9f16e5bc7c4e04848
Reviewed-on: https://review.coreboot.org/c/coreboot/+/67104
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Reviewed-by: Jon Murphy <jpmurphy@google.com>
Reviewed-by: Amanda Hwang <amanda_hwang@compal.corp-partner.google.com>
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This adds support for Micron MT62F2G32D4DS-026 chips.
BUG=b:240289148
TEST=util/spd_tools/bin/spd_gen spd/lp5/memory_parts.json lp5
Signed-off-by: Tarun Tuli <taruntuli@google.com>
Change-Id: I1212506d742178803a7e7bf7e0236d1095f7af9d
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66163
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subratabanik@google.com>
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Datasheet is available in the bug.
BUG=b:238674174
BRANCH=firmware-brya-14505.B
TEST=util/spd_tools/bin/spd_gen spd/lp5/memory_parts.json lp5
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Change-Id: Iadd4bf07d38dbd2e1f47df5024282b04dec3c805
Reviewed-on: https://review.coreboot.org/c/coreboot/+/65795
Reviewed-by: Caveh Jalali <caveh@chromium.org>
Reviewed-by: Reka Norman <rekanorman@chromium.org>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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This adds support for Samsung K3LKCKC0BM-MGCP LP5 chips.
Generatd SPD data with:
util/spd_tools/bin/spd_gen spd/lp5/memory_parts.json lp5
BRANCH=None
BUG=235664831
Signed-off-by: Leo Chou <leo.chou@lcfc.corp-partner.google.com>
Change-Id: I49cea0594f8a94aa7efbb375ea1c28b5d1136498
Reviewed-on: https://review.coreboot.org/c/coreboot/+/65085
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Reka Norman <rekanorman@chromium.org>
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This adds support for Micron "MT62F1G32D4DS-031 WT:B" LP5 chips.
generatd SPD data with:
util/spd_tools/bin/spd_gen spd/lp5/memory_parts.json lp5
BRANCH=none
BUG=b:233822309
Change-Id: Idd7fb074c4747a705a1870cd3d4393867289923b
Signed-off-by: Caveh Jalali <caveh@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/64733
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
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Hynix H58G56AK6BX069 will be used by the brya variant crota. Add
it to the LP5 parts list and regenerate the SPDs using spd_gen.
BUG=b:233830713
TEST=util/spd_tools/bin/spd_gen spd/lp5/memory_parts.json lp5
Signed-off-by: Terry Chen <terry_chen@wistron.corp-partner.google.com>
Change-Id: I6136e17706c6248598886f8f9bd8fdd7efff4dab
Reviewed-on: https://review.coreboot.org/c/coreboot/+/64662
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Reka Norman <rekanorman@chromium.org>
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
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Samsung K3LKLKL0EM-MGCN will be used by the nissa variant craask. Add
it to the LP5 parts list and regenerate the SPDs using spd_gen.
BUG=b:229938024
TEST=util/spd_tools/bin/spd_gen spd/lp5/memory_parts.json lp5
Signed-off-by: Tyler Wang <tyler.wang@quanta.corp-partner.google.com>
Change-Id: I5648f297130eaf8541d99b2db7777774a0b1d8fc
Reviewed-on: https://review.coreboot.org/c/coreboot/+/64439
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kangheui Won <khwon@chromium.org>
Reviewed-by: Reka Norman <rekanorman@chromium.org>
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Micron MT62F2G32D8DR-031 will be used for skyrim P1. Add it to the parts
list and regenerate the SPDs using spd_gen.
BUG=b:213926260
TEST=util/spd_tools/bin/spd_gen spd/lp5/memory_parts.json lp5
Change-Id: Iad2bb53de2b54648d5dd66808973f26b1c8a5df7
Signed-off-by: Amanda Huang <amanda_hwang@compal.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62542
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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Hynix H9JCNNNBK3MLYR-N6E will be used for nereid P1. Add it to the parts
list and regenerate the SPDs using spd_gen.
BUG=b:217096008
TEST=None
Signed-off-by: Reka Norman <rekanorman@google.com>
Change-Id: I8775fe0551e0712507d42a778e04745a07270d71
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61904
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kangheui Won <khwon@chromium.org>
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Samsung K3LKBKB0BM-MGCP will be used by the nissa variant nereid. Add
it to the LP5 parts list and regenerate the SPDs using spd_gen.
BUG=b:197479026
TEST=None
Signed-off-by: Reka Norman <rekanorman@google.com>
Change-Id: I4db983d5015a4dacad0bd03cf7a85f6214856a76
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61442
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kangheui Won <khwon@chromium.org>
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Add the parts below which will be used by the brya variant Vell. Add
the parts to memory_parts.json and generate the SPDs using spd_gen.
Micron MT62F512M32D2DR-031 WT:B
Micron MT62F1G32D4DR-031 WT:B
Hynix H9JCNNNCP3MLYR-N6E
Generated using:
util/spd_tools/bin/spd_gen spd/lp5/memory_parts.json lp5
BUG=b:204284866
TEST=None
Change-Id: Ifbcadfb78281b2b78a61a9b61180c421748193a0
Signed-off-by: Reka Norman <rekanorman@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58929
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
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Add spd/lp5/memory_parts.json with an empty parts list, then run spd_gen
to generate the manifests and empty SPD.
Generated using:
util/spd_tools/bin/spd_gen spd/lp5/memory_parts.json lp5
BUG=b:204284866
TEST=None
Change-Id: I0314314130a1ccc58fb5a0416b110e7a86338fd0
Signed-off-by: Reka Norman <rekanorman@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58928
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
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